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Contents

README

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BTS723GW

Infineon · AC-DC Controllers and Regulators · SOIC-14

BTS723GW from Infineon, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Vbb power_in Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Multiple Vbb pins (1, 7, 8, 14) share the leadframe; wire for max simultaneous short-circuit currents from both channels and low thermal resistance.
2 IN1 input Input for channel 1: activates channel 1 on logic-high signal. CMOS-compatible, ground-referenced with integrated 20 kΩ input series resistor. Absolute max input voltage ±42 V DC; max input current ±2.0 mA DC.
3 ST1 output Diagnostic feedback for channel 1: open-drain status output. Integrated pull-up via SPU pin; reports open-load (OFF state) and thermal shutdown (ON state). Max status current ±2.0 mA DC.
4 GND power_in Logic ground. Independent from load ground. External current-limit resistor (150 Ω recommended) advised for Vbb > Vbb(AZ).
5 ST2 output Diagnostic feedback for channel 2: open-drain status output. Integrated pull-up via SPU pin; reports open-load (OFF state) and thermal shutdown (ON state). Max status current ±2.0 mA DC.
6 IN2 input Input for channel 2: activates channel 2 on logic-high signal. CMOS-compatible, ground-referenced with integrated 20 kΩ input series resistor. Absolute max input voltage ±42 V DC; max input current ±2.0 mA DC.
7 Vbb power_in Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Shares leadframe with pins 1, 8, 14.
8 Vbb power_in Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Shares leadframe with pins 1, 7, 14.
9 OUT2 power_out Protected high-side power output of channel 2. On-state resistance ~90 mΩ typ (each channel, Tj=25°C); nominal load current 2.9 A (one channel active); current limitation 8 A. Pins 9 and 10 must be connected in parallel for spec operation.
10 OUT2 power_out Protected high-side power output of channel 2 (parallel with pin 9). Must be tied to pin 9.
11 SPU input Status Pull-Up: connection for external pull-up voltage source (max ±42 V DC) for the open-drain ST1/ST2 status outputs. Pull-up resistors (~12 kΩ / 850 Ω network) are integrated internally.
12 OUT1 power_out Protected high-side power output of channel 1. On-state resistance ~90 mΩ typ (each channel, Tj=25°C); nominal load current 2.9 A (one channel active); current limitation 8 A. Pins 12 and 13 must be connected in parallel for spec operation.
13 OUT1 power_out Protected high-side power output of channel 1 (parallel with pin 12). Must be tied to pin 12.
14 Vbb power_in Positive power supply voltage (Vbb), operating range 7.0 to 58 V. Shares leadframe with pins 1, 7, 8.

Key specifications

Parameter Value
Manufacturer Infineon
Package SOIC-14
Category PMIC
Pins 14

CAD (KiCad official)

  • Symbol: BTS723GW
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
bts723gw.step 195 KB You want the bare part, or you mark your own boards.
bts723gw-etched.step 2.2 MB You want the part with BTS723GW already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 541 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon datasheet (17 pp, sha256 f58f7d4d2be7bf12, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF