component
AT25SF161B-SSHB-T
Public Unreviewedby Ray
Dialog Semiconductor Adesto Adesto Technologies NOR FLASH, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownAT25SF161B-SSHB-T
Dialog Semiconductor Adesto Adesto Technologies · NOR FLASH · SOIC-8
AT25SF161B-SSHB-T from Dialog Semiconductor Adesto Adesto Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Active-low chip select. Asserting CS# (low) selects the device; deasserting (high) puts it in standby. A high-to-low transition starts an operation; low-to-high ends it. A ~10 kΩ pull-up to VCC is recommended for correct power-up ramp. |
| 2 | SO/IO1 | bidirectional | Serial data output in standard SPI; becomes bidirectional IO1 for Dual-SPI and Quad-SPI read/program commands. Data is clocked out on the falling edge of SCK. High-Z when CS# is deasserted. |
| 3 | WP#/IO2 | bidirectional | Active-low hardware write protect for the Status Register when the Quad Enable (QE) bit is 0; becomes bidirectional IO2 when QE=1 for quad-SPI transfers. Internally pulled high - may be left floating if unused. |
| 4 | GND | power_in | Ground reference for the power supply. Connect to system ground. |
| 5 | SI/IO0 | bidirectional | Serial data input in standard SPI (commands, addresses, write data), latched on the rising edge of SCK. Becomes bidirectional IO0 for Dual- and Quad-SPI read commands. Ignored when CS# is deasserted. |
| 6 | SCK | input | Serial clock input. Command, address, and input data on SI are latched on the rising edge; output data on SO is clocked out on the falling edge. Supports SPI modes 0 and 3 up to 108 MHz. |
| 7 | HOLD#/IO3 | bidirectional | Active-low HOLD pin (pauses SPI transfer without resetting the clocking sequence) when QE=0; becomes bidirectional IO3 for quad-SPI transfers when QE=1. Internally pulled high - may be left floating if unused. |
| 8 | VCC | power_in | Device power supply. 2.7 V to 3.6 V for the -B (SSHB) grade. Add a decoupling capacitor near the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Dialog Semiconductor Adesto Adesto Technologies |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
AT25SF161B-SSHB-TSSHB-TAT25SF161B-SSHB-TSSHB-BAT25SF161B-SSHB-TSSHD-TAT25SF161B-SSHB-TSSHD-BAT25SF161B-SSHB-TSHB-TAT25SF161B-SSHB-TSHB-BAT25SF161B-SSHB-TSHD-TAT25SF161B-SSHB-TSHD-BAT25SF161B-SSHB-TMHB-TAT25SF161B-SSHB-TMHD-TAT25SF161B-SSHB-TUUB-TAT25SF161B-SSHB-TUUD-T
CAD (KiCad official)
- Symbol:
AT25SF161B-SSHB-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Dialog Semiconductor Adesto Adesto Technologies datasheet (61 pp, sha256
619b98776bb02ba8, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).