component
AP5056HSPER
Public Unreviewedby Ray
UMW Battery Management, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdownAP5056HSPER
UMW · Battery Management · SOP-8-EP
AP5056HSPER from UMW, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TEMP | input | Battery temperature sense input. Connects to the wiper of an NTC thermistor divider on the battery pack; charging is inhibited when the pin voltage is outside the safe window (over-temperature / under-temperature protection). |
| 2 | PROG | passive | Charge-current program pin. An external resistor RPROG from PROG to GND sets the fast-charge current (RPROG=2k -> 500 mA typ; RPROG=1k -> 1000 mA typ). Also serves as a current-monitor output; VPROG is typ 1 V during current-mode charging. |
| 3 | GND | power_in | Device ground / VSS reference. All voltages are referenced to this pin. |
| 4 | VCC | power_in | Input supply from USB / adapter. Working range 4.25-5.5 V, absolute max 30 V, with input OVP tripping at typ 6.5 V. A ~10 uF bypass capacitor to GND is recommended. |
| 5 | BAT | power_out | Charge current output to the Li-ion cell. Regulates to a preset 4.2 V float voltage (4.16-4.24 V) and sources up to ~1.4 A absolute max. A ~10 uF capacitor to GND is recommended for stability. |
| 6 | STDBY | output | Standby / charge-complete status, open-drain, active-low. Pulls low (Vol <= 0.5 V at 5 mA) when charging has terminated (input present but cell fully charged); high-Z otherwise. Typically drives an indicator LED to VCC through a series resistor. |
| 7 | CHRG | output | Charging status, open-drain, active-low. Pulls low (Vol <= 0.5 V at 5 mA) while a charge cycle is in progress; high-Z during standby or when charging is inhibited. Typically drives an indicator LED to VCC through a series resistor. |
| 8 | CE | input | Chip enable input. Drive high (or leave pulled high through ~1 k as in the typical application) to enable charging; drive low to place the device in shutdown (supply current drops to ~180 uA). Absolute max VCE = 5.5 V. |
| EP | EPAD | power_in | Exposed thermal pad on the ESOP-8 package underside. Solder to a copper ground plane for heat dissipation; electrically tie to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8-EP |
| Category | PMIC |
| Pins | 9 |
Ordering variants
AP5056HSPERAP5056HSPERHMPERB
CAD (KiCad official)
- Symbol:
AP5056HSPER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ap5056hsper.step |
125 KB | You want the bare part, or you mark your own boards. |
ap5056hsper-etched.step |
2.4 MB | You want the part with AP5056HSPER already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 600 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (13 pp, sha256
6855644f44aa8f28, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).