Digitizes eight analog inputs over I2C at 12-bit resolution. An internal multiplexer selects any of the eight single-ended channels (or four differential pairs), and a built-in 2.5 V reference means no external reference is needed for a full-scale span. Two address pins put up to four devices on one bus, and throughput reaches 50 kSPS. Runs from a single 2.7 to 5 V supply. A compact way to add many slow analog inputs to an I2C system.

Pinout

Pin	Name	Type	Function
1	CH0	input	Analog input channel 0. Selectable through the 8-channel multiplexer; input range 0 to VREF referenced to COM (or ground in single-ended mode).
2	CH1	input	Analog input channel 1. Selectable through the 8-channel multiplexer; input range 0 to VREF.
3	CH2	input	Analog input channel 2. Selectable through the 8-channel multiplexer; input range 0 to VREF.
4	CH3	input	Analog input channel 3. Selectable through the 8-channel multiplexer; input range 0 to VREF.
5	CH4	input	Analog input channel 4. Selectable through the 8-channel multiplexer; input range 0 to VREF.
6	CH5	input	Analog input channel 5. Selectable through the 8-channel multiplexer; input range 0 to VREF.
7	CH6	input	Analog input channel 6. Selectable through the 8-channel multiplexer; input range 0 to VREF.
8	CH7	input	Analog input channel 7. Selectable through the 8-channel multiplexer; input range 0 to VREF.
9	GND	power_in	Analog ground reference for the device. Connect to the system analog ground plane.
10	REFIN/REFOUT	bidirectional	Internal +2.5V reference output / external reference input. Drives out the internal 2.5V reference when the internal reference is enabled; otherwise accepts an external reference between 0.05V and VDD. Bypass with a decoupling capacitor when using the internal reference.
11	COM	input	Common input to the analog multiplexer. Acts as the negative input for the ADC in single-ended mode (typically tied to GND) and as a shared reference for pseudo-differential channel pairs.
12	A0	input	I2C slave address bit 0 (LSB). Combined with the fixed prefix 10010 and A1 to form the 7-bit device address. CMOS logic level, referenced to VDD.
13	A1	input	I2C slave address bit 1. Combined with the fixed prefix 10010 and A0 to form the 7-bit device address, allowing up to four ADS7828 devices on a single I2C bus.
14	SCL	input	I2C serial clock input. Supports Standard (100kHz), Fast (400kHz), and High-Speed (3.4MHz) modes. Open-drain bus, requires an external pull-up resistor to VDD.
15	SDA	bidirectional	I2C serial data line. Open-drain, minimum 3mA sink capability; requires an external pull-up resistor to VDD. Carries command bytes and 12-bit conversion results.
16	VDD	power_in	Power supply input, 2.7V to 5.25V (3.3V nominal). Bypass with a ceramic decoupling capacitor to GND close to the pin.

Key specifications

Parameter	Value
Type	12-bit SAR ADC
Channels	8 single-ended / 4 differential
Interface	I2C (2 address pins)
Throughput	Up to 50 kSPS
Reference	Internal 2.5 V or external
Supply	2.7-5 V
Package	TSSOP-16

Ordering variants

ADS7828E (TSSOP-16, tube)
ADS7828EB (TSSOP-16, better accuracy)
ADS7828IPWR (TSSOP-16, tape & reel)

CAD (KiCad official)

Symbol: Analog_ADC:ADS7828 (KiCad official)
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (23 pp, sha256 5d561f2383b6725b, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF