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ADS1220 24-Bit ADC

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by Ray

24-bit delta-sigma ADC with PGA, two differential inputs, and an on-chip temperature sensor.

adcdelta-sigma24-bitpgaspititssop-16
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ADS1220

Texas Instruments · Analog-to-Digital Converter · TSSOP-16

The ADS1220 is a 24-bit delta-sigma ADC designed for low-power precision measurement. It integrates a programmable gain amplifier, a 2-kSPS data rate, two differential (or four single-ended) inputs, an internal 2.048 V reference, and a temperature sensor, communicating over SPI. It suits bridge sensors, RTDs, and thermocouples.

Pinout

Pin Name Type Function
1 CLK input External clock source input. Connect to DGND to select the internal 2% accurate oscillator.
2 DGND power_in Digital ground return for DVDD (2.3V-5.5V analog+digital operation).
3 AVSS power_in Negative analog power supply. Ground for single-supply operation (AVDD - AVSS in the 2.3V-5.5V range).
4 AIN3/REFN1 input Analog input 3, or negative reference input 1 (REFN1) when the second reference input pair is selected. Internal low-side power switch is connected between AIN3/REFN1 and AVSS for burnout current-source biasing.
5 AIN2 input Analog input 2. Selectable via internal input multiplexer for single-ended or differential ADC conversion.
6 REFN0 input Negative reference input 0 for the external reference input pair (VREF = REFP0 - REFN0).
7 REFP0 input Positive reference input 0 for the external reference input pair (VREF = REFP0 - REFN0).
8 AIN1 input Analog input 1. Selectable via internal input multiplexer for single-ended or differential ADC conversion.
9 AIN0/REFP1 input Analog input 0, or positive reference input 1 (REFP1) when the second reference input pair is selected in the VREF register field.
10 AVDD power_in Positive analog power supply, 2.3V-5.5V referenced to AVSS. Connect a 100 nF (or larger) decoupling capacitor to AVSS.
11 DVDD power_in Positive digital power supply, 2.3V-5.5V referenced to DGND. Connect a 100 nF (or larger) decoupling capacitor to DGND.
12 DRDY output Data-ready output, active low. Falls when a new ADC conversion result is available. Leave unconnected or tie to DVDD through a weak pull-up if not used.
13 DOUT/DRDY output SPI serial data output combined with data-ready indication (active low). Data is shifted out on SCLK edges during a READ command; the pin also pulses low to signal new conversion data.
14 DIN input SPI serial data input (MOSI). Latches command/register data on SCLK edges into the ADS1220.
15 SCLK input SPI serial clock input (mode 1: CPOL=0, CPHA=1). Clocks data in on DIN and out on DOUT/DRDY.
16 CS input SPI chip select input, active low. Enables the serial interface when driven low. Connect to DGND if the device is the only device on the SPI bus and CS is not otherwise used.
PAD PAD passive Thermal/exposed pad on the underside of the VQFN package. Do not connect, or connect only to AVSS. Not present on the TSSOP variant.

Key specifications

Parameter Value
Resolution 24 bits
Architecture Delta-sigma
Data rate 20 SPS to 2 kSPS
Inputs 2 differential / 4 single-ended, multiplexed
PGA gain 1 to 128 V/V
Reference Internal 2.048 V, or external
Interface SPI-compatible
Supply 2.3 V to 5.5 V (AVDD), 2.3 V to 5.5 V (DVDD)
Operating temperature -40 C to 125 C

Ordering variants

  • ADS1220IRVAT
  • ADS1220IRVAR
  • ADS1220IPW
  • ADS1220IPWR

CAD (KiCad official)

  • Symbol: ads1220.kicad_sym
  • Footprint: ads1220.kicad_mod
  • 3D model: TSSOP-16 body from KiCad Package_SO/TSSOP-16_4.4x5mm_P0.65mm. (The ADS1220 also ships in a VQFN-16 option; the TSSOP-16 shown here is pin-identical.)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (80 pp, sha256 ba264d1644fe9de6, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF