A4988
Public Unreviewedby adom
Allegro microstepping bipolar stepper driver, QFN-28. Up to 2 A/coil, 1/16 step, built-in translator (STEP/DIR). Datasheet-verified.
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markdownA4988
Allegro MicroSystems · Bipolar stepper motor driver · QFN-28
A complete microstepping driver for bipolar stepper motors in QFN-28, the chip on the ubiquitous red 'A4988' 3D-printer and CNC driver modules. Its built-in translator means you drive a motor by pulsing STEP and setting DIR, with no phase tables: three mode pins (MS1-MS3) select full, half, quarter, eighth, or sixteenth microstepping. Two DMOS full-bridges deliver up to 2 A per coil (with a heatsink) from a 8-35 V motor supply, with an adjustable current limit (VREF + sense resistors), automatic decay-mode selection, and built-in over-current and thermal shutdown. ENABLE, RESET, and SLEEP round out the control. Pinout is DMOS bridges plus the STEP/DIR/MS logic.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT2B | output | DMOS Full Bridge 2 Output B. Motor phase 2 output; connects to one terminal of stepper motor coil B. Up to ±2 A at up to 35 V (VBB2). |
| 2 | ENABLE | input | Active-low output enable logic input. Logic low enables the DMOS FET outputs; logic high disables all outputs. Translator inputs (STEP, DIR, MSx) remain active regardless of ENABLE. |
| 3 | GND | power_in | Device ground. Must be tied together externally with pin 18 by connecting to the exposed thermal PAD ground plane. |
| 4 | CP1 | passive | Charge pump capacitor terminal. A 0.1 µF ceramic capacitor is connected between CP1 and CP2 for the high-side gate-drive charge pump. |
| 5 | CP2 | passive | Charge pump capacitor terminal. Companion of CP1; 0.1 µF ceramic capacitor tied to CP1. |
| 6 | VCP | passive | Charge-pump reservoir capacitor terminal. A 0.1 µF ceramic capacitor is required between VCP and VBB to act as the reservoir for the high-side FET gate drive supply. |
| 7 | NC | unconnected | No internal connection. Leave floating or tie to ground for layout convenience. |
| 8 | VREG | power_out | Internal regulator decoupling terminal. Nominal 7 V internally generated supply used to drive the sink-side FETs; decouple with a 0.22 µF ceramic capacitor to ground. Monitored for fault protection. |
| 9 | MS1 | input | Microstep resolution select input 1. Combined with MS2/MS3 selects full, half, quarter, eighth, or sixteenth step. Internal 100 kΩ pull-down. |
| 10 | MS2 | input | Microstep resolution select input 2. Combined with MS1/MS3 to select step size. Internal 50 kΩ pull-down. |
| 11 | MS3 | input | Microstep resolution select input 3. Combined with MS1/MS2 to select step size. Internal 100 kΩ pull-down. |
| 12 | RESET | input | Active-low reset input. Drives the translator to the predefined Home state and turns off all FET outputs. STEP inputs are ignored until RESET goes high. |
| 13 | ROSC | passive | Fixed off-time / decay-mode timing terminal. Resistor to GND sets t_OFF ≈ R_OSC/825 µs (with automatic mixed decay). Tied to VDD sets 30 µs off-time and mixed decay; tied to GND sets 30 µs off-time and 100% mixed decay. |
| 14 | SLEEP | input | Active-low sleep input. Logic low disables output FETs, regulator, and charge pump for low-power standby; logic high enables normal operation (allow 1 ms for charge pump stabilization before first STEP). |
| 15 | VDD | power_in | Logic supply input. Operating range 3.0 V to 5.5 V (compatible with 3.3 V and 5 V logic). Decouple with a 0.22 µF ceramic capacitor to GND. |
| 16 | STEP | input | Step-pulse logic input. Each low-to-high transition advances the translator/motor by one microstep as selected by MSx. Minimum HIGH/LOW pulse width 1 µs; setup/hold to input changes 200 ns. |
| 17 | REF | input | Gm current-set reference voltage input (V_REF). Sets peak coil current I_TripMAX = V_REF / (8 × R_S). Range 0 V to 4 V (abs max 5.5 V). |
| 18 | GND | power_in | Device ground. Must be tied together externally with pin 3 by connecting to the exposed thermal PAD ground plane. |
| 19 | DIR | input | Direction logic input. Selects rotation direction of the motor; changes take effect on the next STEP rising edge. |
| 20 | NC | unconnected | No internal connection. Leave floating or tie to ground for layout convenience. |
| 21 | OUT1B | output | DMOS Full Bridge 1 Output B. Motor phase 1 output; connects to one terminal of stepper motor coil A. Up to ±2 A at up to 35 V (VBB1). |
| 22 | VBB1 | power_in | Load (motor) supply for Bridge 1. Operating range 8 V to 35 V; requires local bulk decoupling (typically 100 µF near VBB1/VBB2). |
| 23 | SENSE1 | passive | Bridge 1 current sense resistor terminal. External R_S1 to GND sets phase-1 peak current together with V_REF. Voltage across R_S1 must not exceed 0.5 V (absolute max ±0.5 V). |
| 24 | OUT1A | output | DMOS Full Bridge 1 Output A. Motor phase 1 output; connects to the other terminal of stepper motor coil A. Up to ±2 A at up to 35 V (VBB1). |
| 25 | NC | unconnected | No internal connection. Leave floating or tie to ground for layout convenience. |
| 26 | OUT2A | output | DMOS Full Bridge 2 Output A. Motor phase 2 output; connects to the other terminal of stepper motor coil B. Up to ±2 A at up to 35 V (VBB2). |
| 27 | SENSE2 | passive | Bridge 2 current sense resistor terminal. External R_S2 to GND sets phase-2 peak current together with V_REF. Voltage across R_S2 must not exceed 0.5 V (absolute max ±0.5 V). |
| 28 | VBB2 | power_in | Load (motor) supply for Bridge 2. Operating range 8 V to 35 V; must be tied to VBB1 at the same rail, sharing the 100 µF bulk decoupling. |
| PAD | PAD | power_in | Exposed thermal pad for enhanced thermal dissipation. Solder to a ground plane; the GND pins (3 and 18) must be tied to this pad. |
Key specifications
| Parameter | Value |
|---|---|
| Type | Bipolar stepper motor driver |
| Output | 2 DMOS full-bridges |
| Current | up to 2 A/coil (with heatsink) |
| Microstepping | full, 1/2, 1/4, 1/8, 1/16 (MS1-3) |
| Control | STEP + DIR translator |
| Motor supply | 8-35 V |
| Protection | current limit + thermal + crossover |
| Package | QFN-28 (5x5 mm, exposed pad) |
Ordering variants
A4988SETTR-T (QFN-28)A4988 module (Pololu-style breakout)
CAD (KiCad official)
- Symbol:
A4988 (generated from datasheet; KiCad has no symbol) - Footprint:
Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm - 3D model: QFN-28 (KiCad packages3D)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems datasheet (20 pp, sha256
d1dfba3bb7be2cbf, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).