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Contents

README

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74LVC1G157GW

Nexperia · Signal Switches, Multiplexers, Decoders · SOT-363-6

74LVC1G157GW from Nexperia, in a SOT-363-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I1 input Data input from source 1. Schmitt-trigger CMOS input, overvoltage tolerant to 5.5 V regardless of VCC. Selected when S = HIGH.
2 GND power_in Ground reference (0 V). Common return for supply and signal currents.
3 I0 input Data input from source 0. Schmitt-trigger CMOS input, overvoltage tolerant to 5.5 V regardless of VCC. Selected when S = LOW.
4 Y output Multiplexer output. Drives ±24 mA at VCC = 3.0 V. Follows the input selected by S (Y = I0 when S = LOW, Y = I1 when S = HIGH).
5 VCC power_in Positive supply voltage. Operating range 1.65 V to 5.5 V; absolute maximum 6.5 V. Bypass with 0.1 µF to GND close to the pin.
6 S input Common data select input. S = LOW routes I0 to Y; S = HIGH routes I1 to Y. Schmitt-trigger CMOS input, overvoltage tolerant to 5.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-363-6
Category Logic
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • 74LVC1G157GW
  • 74LVC1G157GWGV
  • 74LVC1G157GWGM
  • 74LVC1G157GWGN
  • 74LVC1G157GWGS

CAD (KiCad official)

  • Symbol: 74LVC1G157GW
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363-6 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 62f9b85c44785ca1, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF