74LVC1G04DCKRG from HANSCHIP semiconductor, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No connect. Internally not bonded; may be left floating or tied to ground for mechanical stability.
2	A	input	Logic input to the inverter. CMOS input; VIH = 0.7VCC (VCC=3V-5.5V), VIL = 0.3VCC. Input voltage range 0 to 5.5V (5V-tolerant regardless of VCC). Input leakage <=+/-5uA.
3	GND	power_in	Ground / negative supply reference (0V). Common return for VCC and signals.
4	Y	output	Inverter output, Y = NOT A. Push-pull CMOS drive; IOH/IOL up to +/-32mA at VCC=4.5V, +/-16mA at 3V, +/-8mA at 2.3V, +/-4mA at 1.65V. Typical propagation delay tPHL/tPLH = 10ns (CL=15pF, VCC=5V).
5	VCC	power_in	Positive supply. Operating range 1.65V to 5.5V; absolute max 6.5V. Quiescent ICC ~0.01uA typ (10uA max). Bypass with 0.1uF close to the pin.

Key specifications

Parameter	Value
Manufacturer	HANSCHIP semiconductor
Package	SC-70-5
Category	Logic
Pins	5

Ordering variants

74LVC1G04DCKRG
74LVC1G04DCKRGDBVRG

CAD (KiCad official)

Symbol: 74LVC1G04DCKRG
Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
3D model: SC-70-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HANSCHIP semiconductor datasheet (8 pp, sha256 6258e3f2a523c4cd, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF