74LCX244FT from TOSHIBA, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OE	input	Active-low output enable for bank 1 (drives outputs 1Y1-1Y4). When low, bank-1 outputs follow their A inputs; when high, bank-1 outputs are in high-impedance (Z) state.
2	1A1	input	Bank 1 channel 1 data input. 5-V tolerant CMOS input; passes non-inverted to 1Y1 when 1OE is low.
3	2Y4	tri_state	Bank 2 channel 4 buffered output. Drives the non-inverted state of 2A4 when 2OE is low; Hi-Z when 2OE is high. IOH/IOL = 24 mA min (VCC = 3.0 V).
4	1A2	input	Bank 1 channel 2 data input. 5-V tolerant CMOS input; passes non-inverted to 1Y2 when 1OE is low.
5	2Y3	tri_state	Bank 2 channel 3 buffered output. Drives the non-inverted state of 2A3 when 2OE is low; Hi-Z when 2OE is high.
6	1A3	input	Bank 1 channel 3 data input. 5-V tolerant CMOS input; passes non-inverted to 1Y3 when 1OE is low.
7	2Y2	tri_state	Bank 2 channel 2 buffered output. Drives the non-inverted state of 2A2 when 2OE is low; Hi-Z when 2OE is high.
8	1A4	input	Bank 1 channel 4 data input. 5-V tolerant CMOS input; passes non-inverted to 1Y4 when 1OE is low.
9	2Y1	tri_state	Bank 2 channel 1 buffered output. Drives the non-inverted state of 2A1 when 2OE is low; Hi-Z when 2OE is high.
10	GND	power_in	Ground reference (0 V) for the device.
11	2A1	input	Bank 2 channel 1 data input. 5-V tolerant CMOS input; passes non-inverted to 2Y1 when 2OE is low.
12	1Y4	tri_state	Bank 1 channel 4 buffered output. Drives the non-inverted state of 1A4 when 1OE is low; Hi-Z when 1OE is high.
13	2A2	input	Bank 2 channel 2 data input. 5-V tolerant CMOS input; passes non-inverted to 2Y2 when 2OE is low.
14	1Y3	tri_state	Bank 1 channel 3 buffered output. Drives the non-inverted state of 1A3 when 1OE is low; Hi-Z when 1OE is high.
15	2A3	input	Bank 2 channel 3 data input. 5-V tolerant CMOS input; passes non-inverted to 2Y3 when 2OE is low.
16	1Y2	tri_state	Bank 1 channel 2 buffered output. Drives the non-inverted state of 1A2 when 1OE is low; Hi-Z when 1OE is high.
17	2A4	input	Bank 2 channel 4 data input. 5-V tolerant CMOS input; passes non-inverted to 2Y4 when 2OE is low.
18	1Y1	tri_state	Bank 1 channel 1 buffered output. Drives the non-inverted state of 1A1 when 1OE is low; Hi-Z when 1OE is high.
19	2OE	input	Active-low output enable for bank 2 (drives outputs 2Y1-2Y4). When low, bank-2 outputs follow their A inputs; when high, bank-2 outputs are in high-impedance (Z) state.
20	VCC	power_in	Positive supply voltage. Operating range 1.65 to 3.6 V (data retention from 1.5 V). Inputs and outputs are 5-V tolerant regardless of VCC.

Key specifications

Parameter	Value
Manufacturer	TOSHIBA
Package	TSSOP-20
Category	Logic
Pins	20

Ordering variants

74LCX244FT

CAD (KiCad official)

Symbol: 74LCX244FT
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`74lcx244ft.step`	267 KB	You want the bare part, or you mark your own boards.
`74lcx244ft-etched.step`	2.1 MB	You want the part with `74LCX244FT` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 568 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TOSHIBA datasheet (9 pp, sha256 869201119557fe6a, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF