74HC4052M from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Y0B	bidirectional	B-side independent analog input/output channel 0. Connects to common ZB when A1=L, A0=L and E=L.
2	Y2B	bidirectional	B-side independent analog input/output channel 2. Connects to common ZB when A1=H, A0=L and E=L.
3	ZB	bidirectional	B-side common analog input/output. Muxed to one of Y0B..Y3B according to A1/A0 while E is low.
4	Y3B	bidirectional	B-side independent analog input/output channel 3. Connects to common ZB when A1=H, A0=H and E=L.
5	Y1B	bidirectional	B-side independent analog input/output channel 1. Connects to common ZB when A1=L, A0=H and E=L.
6	~E	input	Active-low enable input. When low, one channel per group is on according to A0/A1. When high, all switches are in high-impedance off state regardless of A0/A1.
7	VEE	power_in	Negative analog supply for the switch channels. Recommended -6.0 V to 0 V; VDD-VEE must not exceed 9 V (12 V absolute max). Tie to VSS (0 V) for pure digital-multiplexer use.
8	VSS	power_in	Digital ground / logic reference for A0, A1 and E inputs.
9	A1	input	Digital channel-select input, MSB of the 2-bit selector shared by both A and B switch groups. Referenced to VSS..VDD.
10	A0	input	Digital channel-select input, LSB of the 2-bit selector shared by both A and B switch groups. Referenced to VSS..VDD.
11	Y3A	bidirectional	A-side independent analog input/output channel 3. Connects to common ZA when A1=H, A0=H and E=L.
12	Y0A	bidirectional	A-side independent analog input/output channel 0. Connects to common ZA when A1=L, A0=L and E=L.
13	ZA	bidirectional	A-side common analog input/output. Muxed to one of Y0A..Y3A according to A1/A0 while E is low.
14	Y1A	bidirectional	A-side independent analog input/output channel 1. Connects to common ZA when A1=L, A0=H and E=L.
15	Y2A	bidirectional	A-side independent analog input/output channel 2. Connects to common ZA when A1=H, A0=L and E=L.
16	VDD	power_in	Positive supply for digital logic and switch drivers. Recommended 3.0 V to 9.0 V (typ 5 V); absolute max 12 V. VDD-VEE must be within 9 V recommended (12 V absolute max).

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	SOP-16
Category	Logic
Pins	16

Ordering variants

74HC4052MN
74HC4052MM/TR
74HC4052MMT/TR
74HC4052MMS/TR
74HC4052MLQ/TR

CAD (KiCad official)

Symbol: 74HC4052M
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`74hc4052m.step`	217 KB	You want the bare part, or you mark your own boards.
`74hc4052m-etched.step`	2.2 MB	You want the part with `74HC4052M` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 558 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (13 pp, sha256 c10511caf4ff602c, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF