74HC4051M from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Y4	bidirectional	Independent analog input/output channel 4. Connects to common Z pin when A2:A0 = 100 and E is low. Analog signal range: VEE to VDD.
2	Y6	bidirectional	Independent analog input/output channel 6. Connects to common Z pin when A2:A0 = 110 and E is low. Analog signal range: VEE to VDD.
3	Z	bidirectional	Common analog input/output. This pin is the shared node connected to whichever Yn channel is selected by A2:A0 while E is asserted low.
4	Y7	bidirectional	Independent analog input/output channel 7. Connects to common Z pin when A2:A0 = 111 and E is low. Analog signal range: VEE to VDD.
5	Y5	bidirectional	Independent analog input/output channel 5. Connects to common Z pin when A2:A0 = 101 and E is low. Analog signal range: VEE to VDD.
6	E	input	Active-low enable input. When low, one Yn channel selected by A2:A0 is connected to Z (low-impedance path). When high, all channels are disabled (high-impedance).
7	VEE	power_in	Negative analog supply voltage. Range: -6.0 V to 0 V. VDD-VEE must be 3-9 V. Tie to VSS for single-supply digital mux use.
8	VSS	power_in	Ground / digital logic reference (0 V). Reference for digital control inputs A0-A2 and E.
9	A2	input	Channel-select address bit 2 (MSB). Together with A1 and A0 selects which Yn is routed to Z when E is low. Referenced between VSS and VDD.
10	A1	input	Channel-select address bit 1. Together with A2 and A0 selects which Yn is routed to Z when E is low.
11	A0	input	Channel-select address bit 0 (LSB). Together with A2 and A1 selects which Yn is routed to Z when E is low.
12	Y3	bidirectional	Independent analog input/output channel 3. Connects to common Z pin when A2:A0 = 011 and E is low. Analog signal range: VEE to VDD.
13	Y0	bidirectional	Independent analog input/output channel 0. Connects to common Z pin when A2:A0 = 000 and E is low. Analog signal range: VEE to VDD.
14	Y1	bidirectional	Independent analog input/output channel 1. Connects to common Z pin when A2:A0 = 001 and E is low. Analog signal range: VEE to VDD.
15	Y2	bidirectional	Independent analog input/output channel 2. Connects to common Z pin when A2:A0 = 010 and E is low. Analog signal range: VEE to VDD.
16	VDD	power_in	Positive supply voltage. Range: 3.0 V to 9.0 V (relative to VSS). Also the reference for digital control inputs. VDD-VEE must not exceed 9 V.

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	SOP-16
Category	Logic
Pins	16

Ordering variants

74HC4051MM/TR
74HC4051MN
74HC4051MMT/TR
74HC4051MMS/TR
74HC4051MLQ/TR

CAD (KiCad official)

Symbol: 74HC4051M
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`74hc4051m.step`	217 KB	You want the bare part, or you mark your own boards.
`74hc4051m-etched.step`	2.1 MB	You want the part with `74HC4051M` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 538 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (16 pp, sha256 f2f56de053e5258f, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF