component
74HC165M
Public Unreviewedby Ray
HGSEMI Shifting Register, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdown74HC165M
HGSEMI · Shifting Register · SOP-16
74HC165M from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PL | input | Asynchronous parallel load input, active low. When PL is low, the state of D0-D7 is loaded into the internal register regardless of CP or CE. |
| 2 | CP | input | Clock input. Data is shifted on the low-to-high (rising) edge of CP when CE is low and PL is high. |
| 3 | D4 | input | Parallel data input bit 4. Loaded into the internal shift register when PL is asserted low. |
| 4 | D5 | input | Parallel data input bit 5. Loaded into the internal shift register when PL is asserted low. |
| 5 | D6 | input | Parallel data input bit 6. Loaded into the internal shift register when PL is asserted low. |
| 6 | D7 | input | Parallel data input bit 7 (last stage). Loaded into the internal shift register when PL is asserted low. |
| 7 | /Q7 | output | Complementary (inverted) serial output of the last stage of the shift register. |
| 8 | GND | power_in | Ground reference (0 V). |
| 9 | Q7 | output | True serial output of the last stage of the shift register. |
| 10 | DS | input | Serial data input. Sampled into the first stage of the shift register on the rising edge of CP when CE is low. |
| 11 | D0 | input | Parallel data input bit 0. Loaded into the internal shift register when PL is asserted low. |
| 12 | D1 | input | Parallel data input bit 1. Loaded into the internal shift register when PL is asserted low. |
| 13 | D2 | input | Parallel data input bit 2. Loaded into the internal shift register when PL is asserted low. |
| 14 | D3 | input | Parallel data input bit 3. Loaded into the internal shift register when PL is asserted low. |
| 15 | CE | input | Clock enable input, active low. When CE is high the CP input is inhibited; when CE is low the clock is enabled. |
| 16 | VCC | power_in | Positive supply voltage. Recommended operating range 2.0 V to 6.0 V (typ. 5.0 V); absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
74HC165MM/TR74HC165MN74HC165MMT/TR
CAD (KiCad official)
- Symbol:
74HC165M - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
74hc165m.step |
217 KB | You want the bare part, or you mark your own boards. |
74hc165m-etched.step |
2.0 MB | You want the part with 74HC165M already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 505 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (17 pp, sha256
41529863b9a0876e, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).