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74HC138D

Nexperia · Signal Switches / Encoders & Decoders / Multiplexers · SOIC-16

74HC138D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address input 0 (LSB). Binary select input for the decoder; combined with A1 and A2 selects which of the eight outputs is asserted LOW when the device is enabled.
2 A1 input Address input 1. Binary select input for the decoder.
3 A2 input Address input 2 (MSB). Binary select input for the decoder.
4 E1 input Enable input 1, active LOW. Must be LOW (together with E2 LOW and E3 HIGH) to enable the selected output; otherwise all outputs are HIGH.
5 E2 input Enable input 2, active LOW. Must be LOW (together with E1 LOW and E3 HIGH) to enable outputs.
6 E3 input Enable input 3, active HIGH. Must be HIGH (together with E1 and E2 LOW) to enable outputs.
7 Y7 output Decoder output 7, active LOW. Asserted LOW when A2=A1=A0=1 and the device is enabled.
8 GND power_in Ground reference (0 V). Common return for supply and logic signals.
9 Y6 output Decoder output 6, active LOW. Asserted LOW when A2A1A0 = 110 and device is enabled.
10 Y5 output Decoder output 5, active LOW. Asserted LOW when A2A1A0 = 101 and device is enabled.
11 Y4 output Decoder output 4, active LOW. Asserted LOW when A2A1A0 = 100 and device is enabled.
12 Y3 output Decoder output 3, active LOW. Asserted LOW when A2A1A0 = 011 and device is enabled.
13 Y2 output Decoder output 2, active LOW. Asserted LOW when A2A1A0 = 010 and device is enabled.
14 Y1 output Decoder output 1, active LOW. Asserted LOW when A2A1A0 = 001 and device is enabled.
15 Y0 output Decoder output 0, active LOW. Asserted LOW when A2A1A0 = 000 and device is enabled.
16 VCC power_in Positive supply voltage, 2.0 V to 6.0 V (recommended). Provides power to the internal logic.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-16
Category Logic
Pins 16

Ordering variants

  • 74HC138DD
  • 74HC138DPW
  • 74HC138DBQ

CAD (KiCad official)

  • Symbol: 74HC138D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
74hc138d.step 217 KB You want the bare part, or you mark your own boards.
74hc138d-etched.step 2.1 MB You want the part with 74HC138D already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 537 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 645120bc441507e9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF