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74HC08D

Nexperia · Gates · SOIC-14

74HC08D from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input A of gate 1 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
2 1B input Data input B of gate 1 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
3 1Y output Data output Y of gate 1. Push-pull CMOS output; 1Y = 1A AND 1B.
4 2A input Data input A of gate 2 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
5 2B input Data input B of gate 2 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
6 2Y output Data output Y of gate 2. Push-pull CMOS output; 2Y = 2A AND 2B.
7 GND power_in Ground reference (0 V). All voltages are referenced to GND.
8 3Y output Data output Y of gate 3. Push-pull CMOS output; 3Y = 3A AND 3B.
9 3A input Data input A of gate 3 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
10 3B input Data input B of gate 3 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
11 4Y output Data output Y of gate 4. Push-pull CMOS output; 4Y = 4A AND 4B.
12 4A input Data input A of gate 4 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
13 4B input Data input B of gate 4 (2-input AND). CMOS-level logic input; includes clamp diodes to VCC and GND.
14 VCC power_in Positive supply voltage. Recommended operating range 2.0 V to 6.0 V (74HC08); absolute maximum -0.5 V to +7 V. Decouple to GND with a local 0.1 uF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-14
Category Logic
Pins 14

Ordering variants

  • 74HC08DD
  • 74HC08DDB
  • 74HC08DPW
  • 74HC08DBQ

CAD (KiCad official)

  • Symbol: 74HC08D
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
74hc08d.step 195 KB You want the bare part, or you mark your own boards.
74hc08d-etched.step 1.9 MB You want the part with 74HC08D already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 480 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 6ef09938e8814089, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF