component

74AHC1G32GW

Public Unreviewed

by Ray

Nexperia Gates, SOT-353. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentlogic74ahc1g32gw
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74AHC1G32GW

Nexperia · Gates · SOT-353

74AHC1G32GW from Nexperia, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Data input B of the 2-input OR gate. Overvoltage tolerant up to 5.5 V regardless of VCC, enabling mixed-voltage translation.
2 A input Data input A of the 2-input OR gate. Overvoltage tolerant up to 5.5 V regardless of VCC.
3 GND power_in Ground reference (0 V) for the device.
4 Y output Data output of the OR gate; Y = A OR B. Push-pull CMOS output; VOH ~ VCC - 0.1 V at IO = -50 uA; capable of ±8 mA drive at VCC = 4.5 V.
5 VCC power_in Supply voltage input; 2.0 V to 5.5 V for 74AHC1G32, 4.5 V to 5.5 V for 74AHCT1G32. Bypass with a decoupling capacitor to GND.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-353
Category Logic
Pins 5

Ordering variants

  • 74AHC1G32GW
  • 74AHC1G32GWGV

CAD (KiCad official)

  • Symbol: 74AHC1G32GW
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 1628a0d73e0a8587, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF