component
25LC640AT-I
Public Unreviewedby Ray
Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdown25LC640AT-I
Microchip · EEPROM · SOIC-8
25LC640AT-I from Microchip, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Active-low Chip Select. Pulling CS low selects the device and enables SPI communication; a low-to-high transition ends the current operation and (for writes) starts the internal write cycle. Must be driven from Vss to Vcc CMOS levels. |
| 2 | SO | output | Serial Data Output. Shifts out data on the falling edge of SCK, MSB first. High-impedance when CS is high or HOLD is asserted (Voh ≥ Vcc-0.5 V at Ioh = -400 µA; Vol ≤ 0.4 V at Iol = 2.1 mA). |
| 3 | WP | input | Active-low Write Protect. When held low with the WPEN bit of the STATUS register set, prevents any writes to the STATUS register (hardware write-protect of block-protect settings). Tie to Vcc if unused. |
| 4 | VSS | power_in | Ground reference (0 V). |
| 5 | SI | input | Serial Data Input. Instruction opcodes, addresses and data are clocked in MSB first on the rising edge of SCK after CS is brought low. CMOS input; Vih1 ≥ 0.7 Vcc. |
| 6 | SCK | input | Serial Clock input. Provides the timing reference for SI (sampled on rising edge) and SO (updated on falling edge). Supports SPI Mode 0,0 and Mode 1,1. Max 10 MHz at Vcc ≥ 4.5 V, 5 MHz at 2.5 V, 3 MHz at 1.8 V. |
| 7 | HOLD | input | Active-low Hold input. When asserted with CS low, pauses serial communication so the host MCU can service higher-priority interrupts; SO goes high-impedance and SI/SCK transitions are ignored until HOLD is released. Must be high for normal operation. |
| 8 | VCC | power_in | Supply voltage. 25LC640A operating range 2.5 V to 5.5 V (25AA640A variant is 1.8-5.5 V). Absolute max 6.5 V. Typical Icc: 5 mA read/write at 5.5 V, 1 µA standby at 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
25LC640AT-I/SN25LC640AT-I/P25LC640AT-I/ST25LC640AT-I/MS25LC640AT-I/MF25LC640AT-I/MNY25LC640AT-I/ST (X variant)
CAD (KiCad official)
- Symbol:
25LC640AT-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
25lc640at-i.step |
122 KB | You want the bare part, or you mark your own boards. |
25lc640at-i-etched.step |
2.0 MB | You want the part with 25LC640AT-I already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 501 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip datasheet (35 pp, sha256
b26afb22b1cb92d8, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).