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24C32N

XBLW 24C32N XBLW · EEPROM · DIP-8

24C32N from XBLW 24C32N XBLW, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device/chip select address input bit 0. Hardwire to VCC (VIH) or GND (VIL) to set the low bit of the 3-bit slave address; recommend a 10kΩ or smaller pull to a known state to avoid capacitive-coupling ambiguity. Internally recognized as VIL if left unconnected.
2 A1 input Device/chip select address input bit 1. Tie to VCC or GND to set the middle bit of the slave-address field; recommend ≤10kΩ pull. Internally recognized as VIL if left floating.
3 A2 input Device/chip select address input bit 2 (MSB of the 3-bit hardware address). Tie to VCC or GND; recommend ≤10kΩ pull. Internally recognized as VIL if left floating.
4 GND power_in Device ground return (0 V reference).
5 SDA bidirectional Serial data line for the 2-wire (I²C-compatible) bus. Open-drain output; requires an external pull-up resistor to VCC and may be wire-ORed with other open-drain devices.
6 SCL input Serial clock input for the 2-wire bus. Rising edge latches data into the EEPROM; falling edge clocks data out. Schmitt-trigger filtered input; supports 1000 kHz at 2.5-5V and 400 kHz at 1.8V.
7 WP input Hardware write-protect input. When tied to VIH/VCC, all programming (write) operations to the EEPROM array are disabled; when tied low (VIL) or left floating, writes are enabled. Read operations are unaffected. Recommend a ≤10kΩ pull to a known state.
8 VCC power_in Main supply input, 1.8V to 5.5V. Decouple locally with a ceramic bypass capacitor (typ. 100 nF) to GND.

Key specifications

Parameter Value
Manufacturer XBLW 24C32N XBLW
Package DIP-8
Category Memory
Pins 8

Ordering variants

  • 24C32NN
  • 24C32NBN
  • 24C32NMN
  • 24C32NTN
  • 24C32NDN
  • 24C32ND6
  • 24C32NS

CAD (KiCad official)

  • Symbol: 24C32N
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
24c32n.step 271 KB You want the bare part, or you mark your own boards.
24c32n-etched.step 1.5 MB You want the part with 24C32N already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 374 faces against 148 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW 24C32N XBLW datasheet (18 pp, sha256 e4967cc78153e97f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF