component
24C16BN
Public Unreviewedby Ray
XBLW 24C16BN XBLW EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdown24C16BN
XBLW 24C16BN XBLW · EEPROM · SOP-8
24C16BN from XBLW 24C16BN XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect. 24C16 does not use any device address pins, so on the 8-lead DIP/SOP/MSOP/TSSOP package pins 1-3 are unused and may be left floating or tied to GND. |
| 2 | NC | unconnected | No connect. Unused on the 8-lead SOP variant; leave floating or tie to GND. |
| 3 | NC | unconnected | No connect. Unused on the 8-lead SOP variant; leave floating or tie to GND. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Serial data input / open-drain output for the two-wire (I2C-compatible) bus. Requires an external pull-up resistor to VCC (typ. 4.7 kOhm). Can be wire-ORed with other open-drain outputs. Schmitt-trigger filtered input. |
| 6 | SCL | input | Serial clock input for the two-wire (I2C-compatible) bus. Rising edge latches data into the EEPROM; falling edge clocks data out. Requires an external pull-up resistor to VCC. Bus rates up to 1 MHz (VCC >= 2.5 V) or 400 kHz (VCC = 1.8 V). |
| 7 | WP | input | Write Protect. Tie to VIL (or GND) to allow programming of the EEPROM array; tie to VIH (or VCC) to disable all write/programming operations. Read operations are unaffected. Internally recognized as VIL if left floating, but the datasheet recommends always driving WP to a known state (pull-up/down resistor <=10 kOhm) to avoid capacitive coupling issues. |
| 8 | VCC | power_in | Positive power supply, 1.8 V to 5.5 V. Standby current typically 0.02 uA @ 1.8 V and 0.06 uA @ 5.5 V. Decouple with a 0.1 uF ceramic capacitor close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW 24C16BN XBLW |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
24C16BN24C16BNN24C16BNMN24C16BNTN24C16BNDN24C16BND624C16BNS
CAD (KiCad official)
- Symbol:
24C16BN - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
24c16bn.step |
122 KB | You want the bare part, or you mark your own boards. |
24c16bn-etched.step |
1.6 MB | You want the part with 24C16BN already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 404 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW 24C16BN XBLW datasheet (20 pp, sha256
cd886c4c7b15f274, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).