molecule
12 V to 5 V / 1 A Buck Molecule (TPS54202), built in Altium Designer
Public Unreviewedby Colby Knox
A 12 V to 5 V, 1 A TPS54202 buck molecule designed and built by AI in Altium Designer from one sentence, with the Altium project, Gerbers, BOM, simulation and current and heat analysis.
← Commit history
Altium Designer build of the TPS54202 buck molecule: Altium project, manufacturing set, STEP and GLB, design, simulation, Fields report, datasheet
47 files changed
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diff truncated
README.md+88−1aiflow/fields.json+4544aiflow/prompt.txt+1aiflow/requirements.json+10aiflow/spec.json+376altium/Buck12V5V.Manufacturing.OutJob+88altium/Buck12V5V.PcbDocaltium/Buck12V5V.PcbLibaltium/Buck12V5V.PrjPcb+20altium/Buck12V5V.SchDocaltium/Buck12V5V.SchLibdesign/bom.csv+41design/calcs.json+74design/calcs.py+112design/netlist.json+584design/tests.json+10docs/datasheet.pdfdocs/img/board-2d-altium.pngdocs/img/board-3d-altium.pngdocs/img/board-bottom.pngdocs/img/board-top.pngdocs/img/fields-current-3d.pngdocs/img/prompt-hydrogen.pngdocs/img/sim-loop.pngdocs/img/sim-transient-12v.pngmanufacturing/Bill of Materials-Buck12V5V.csv +17manufacturing/Buck12V5V-gerbers.zipmanufacturing/Buck12V5V.GBL+1048manufacturing/Buck12V5V.GBO+319manufacturing/Buck12V5V.GBP+17manufacturing/Buck12V5V.GBS+87manufacturing/Buck12V5V.GKO+17manufacturing/Buck12V5V.GM1+17manufacturing/Buck12V5V.GM13+269manufacturing/Buck12V5V.GM15+279manufacturing/Buck12V5V.GPB+43manufacturing/Buck12V5V.GPT+218manufacturing/Buck12V5V.GTL+1976manufacturing/Buck12V5V.GTO+1531manufacturing/Buck12V5V.GTP+192manufacturing/Buck12V5V.GTS+262manufacturing/Buck12V5V.TXT+46manufacturing/Pick Place for Buck12V5V.csv +21manufacturing/bom-jlcpcb.csv+15manufacturing/cpl-jlcpcb.csv+21molecule/buck-12v5v-altium.glbmolecule/buck-12v5v-altium.step+16446README.md+88−1@@ -1,3 +1,90 @@ # 12 V to 5 V / 1 A Buck Molecule (TPS54202), built in Altium Designer -A 12 V to 5 V, 1 A TPS54202 buck molecule designed and built by AI in Altium Designer from one sentence, with the Altium project, Gerbers, BOM, simulation and current and heat analysis.+++A 12 V to 5 V, 1 A synchronous buck on the TI TPS54202, built as a complete board in **Altium Designer** from one sentence typed into Claude Code inside [Adom Hydrogen](https://wiki.adom.inc/adom/hydrogen):++> Use adom-aiflow to design a 12 V to 5 V, 1 A buck converter using the TPS54202, and build it as a complete board in Altium Designer.++This is part 3 of the series: the same brief as John's [KiCad build](https://wiki.adom.inc/john/buck-12v5v-molecule) and the [Fusion 360 build](https://wiki.adom.inc/john/buck-12v5v-molecule/files/fusion-360/README.md). The AI was Claude Opus 5.5 running [Adom AI Flow](https://wiki.adom.inc/adom/adom-aiflow). It drove Altium Designer 26.11.1 on a Windows PC through the [Altium Bridge](https://wiki.adom.inc/adom/altium-bridge), one edit at a time, each read back from the live board. Nobody touched Altium during the run. It took 1 h 48 min from the prompt to a finished board, Gerbers included.++The board has not been fabricated. Everything below is design, simulation and analysis.++## Gallery++| | |+|---|---|+|  |  |+| The routed and poured board in Altium Designer's 2D view. | The prompt, as sent. |+|  |  |+| The top, drawn from the exported Gerbers. | The bottom, mirrored as seen with the board flipped over. |+|  |  |+| [Adom Fields](https://wiki.adom.inc/adom/adom-fields): the current through the copper and vias, solved on this board. | ngspice loop gain at 12 V with 0, 47, 68 and 100 pF feed-forward. |++## Key specs++| | |+|---|---|+| input | 12 V nominal, designed for 9 to 16 V; the EN undervoltage lockout starts at 8.58 V and stops at 6.87 V |+| output | 5 V (4.98 V nominal from stocked divider values), 1 A continuous |+| controller | TI TPS54202DDCR, 500 kHz synchronous buck, internal compensation, SOT-23-6 |+| inductor | 15 uH Abracon AMPLH5030S-150MT (Isat 3.7 A); ripple 0.39 A at 12 V |+| output capacitance | 3 x 22 uF X5R, 36.3 uF effective at 5 V |+| loop (ngspice, 12 V, 1 A) | 28.8 kHz crossover, 108 deg phase margin with 68 pF Cff |+| output ripple (ngspice, 1 A) | 2.4 mV at 9 V, 3.2 mV at 12 V, 3.9 mV at 16 V |+| load step (ngspice) | 80 mV for a 0.5 A step at 9, 12 and 16 V |+| simulation | 18 of 18 checks pass ([sim/sim-results.json](sim/sim-results.json)) |+| efficiency (estimate) | 93 % at 12 V, 1 A |+| current density (Adom Fields) | 42 A/mm2 peak at 1 oz |+| thermal (Adom Fields, still air) | U1 +43 C, L1 +38 C, hottest point +49 C beside U1's ground pin; 55 C budget |+| board | 28 x 20 mm, 2 layers, 4 medium machine pins, 7 contacts, test points on every rail |+| tools | Altium Designer 26.11.1, AI Flow 0.1.99, Altium Bridge 0.2.50, Claude Opus 5.5 |++## Open items before ordering++These are findings from the run and from making its video. They are listed here rather than hidden:++- **The board thickness.** The Altium project kept Altium's default layer stack, a 0.4 mm board. The design and the heat analysis assume 1.6 mm FR4: set the stack, or put 1.6 mm and 1 oz copper on the fab order.+- **The switch node.** It is 18.2 mm of copper against a 12 mm budget. U1's switch pin and L1 are further apart than in the KiCad build.+- **Component clearance.** L1's body sits about 0.05 mm from a neighbour, under Altium's default 10 mil component clearance.+- **Silkscreen.** Altium's DRC reports silkscreen-to-silkscreen and silkscreen-to-mask warnings. A few labels crowd each other near U1 and L1.+- **What Adom Fields flagged** in [aiflow/fields.json](aiflow/fields.json):+ - three connectors (J2, J5, J7) carry GND off the board, so cables that meet off the board would close a ground loop;+ - two board edges have no ground via within 4.6 mm;+ - VIN, EN and VOUT have no protection diodes.++## Parts++Every part has its own page on the Adom wiki, with its symbol, footprint and 3D model. The BOM with every distributor number is [design/bom.csv](design/bom.csv). The inductor's 3D model was rebuilt on [its page](https://wiki.adom.inc/john/amplh5030s-150mt) during this build: the vendor model's print and terminals clipped through its body.++| part | qty | refs | value | what it does | source |+|---|---|---|---|---|---|+| TPS54202DDCR<br>Texas Instruments | 1 | U1 | TPS54202DDCR | sync buck 4.5-28 V 2 A 500 kHz | Mouser 595-TPS54202DDCR |+| AMPLH5030S-150MT<br>Abracon | 1 | L1 | 15uH | output inductor | Mouser 815-AMPLH5030S-150T |+| EEE-FK1V470P<br>Panasonic | 1 | C1 | 47uF 35V | input bulk (cable damping) | Mouser 667-EEE-FK1V470P |+| CC1206KKX7R8BB106<br>Yageo | 2 | C2, C3 | 10uF 25V X7R | input ceramic | Mouser 603-CC126KKX7R8BB106 |+| 0603B104J500CT<br>Walsin | 2 | C4, C5 | 100nF 50V X7R | VIN pin HF bypass | Adom stock |+| CL21A226MPQNNNE<br>Samsung | 3 | C6, C7, C8 | 22uF 10V X5R | output ceramic | Adom stock |+| 0402N680J500CT<br>Walsin | 1 | C9 | 68pF C0G | feed-forward across Rtop | Adom stock |+| CR0402-FX-6802GLF<br>Bourns | 1 | R1 | 68k | FB top (series part 1) | Adom stock |+| CR0402-FX-5601GLF<br>Bourns | 1 | R2 | 5.6k | FB top (series part 2) | Adom stock |+| CR0402-FX-1002GLF<br>Bourns | 3 | R3, R7, R8 | 10k | FB bottom | Adom stock |+| CR0402-FX-1004GLF<br>Bourns | 1 | R4 | 1M | EN UVLO top | Adom stock |+| CR0402-FX-1503GLF<br>Bourns | 1 | R5 | 150k | EN UVLO bottom | Adom stock |+| CR0402-FX-2201GLF<br>Bourns | 1 | R6 | 2.2k | LED resistor | Adom stock |+| IN-S63BTG<br>Inolux | 1 | D1 | green LED | 5 V power-good indicator | Adom stock |+| MachineContactMedium<br>Adom | 7 | J1, J2, J3, J4, J5, J6, J7 | MachineContactMedium | molecule contact (VIN) | Adom stock |+| MachinePinMediumShort<br>Adom | 4 | MP1, MP2, MP3, MP4 | MachinePinMediumShort | molecule machine pin (GND) | Adom stock |+| no part<br> | 9 | TP1, TP2, TP3, TP4, TP6, TP7, TP8, TP5, TP9 | SW | test pad (SW) | no part |++## What is in this repo++| folder | contents |+|---|---|+| `altium/` | The Altium Designer project: `Buck12V5V.PrjPcb`, the schematic, the board, the project libraries (`.SchLib`, `.PcbLib`) and the manufacturing OutJob. |+| `manufacturing/` | Gerbers (and `Buck12V5V-gerbers.zip`), NC drill, pick and place, the BOM, and the JLCPCB BOM and CPL. |+| `molecule/` | The board's STEP (exported from Altium) and GLB. |+| `design/` | `calcs.py` (every datasheet equation; it regenerates `calcs.json`), the netlist the schematic and board were built from, the BOM and the test plan. |+| `sim/` | The ngspice loop and switching models, their results and plots. |+| `aiflow/` | The prompt, the requirements, the layout spec the board was built to, and the Adom Fields report. |+| `docs/datasheet.pdf` | The project datasheet. |
aiflow/fields.jsonadded+4544@@ -0,0 +1,4544 @@+{+ "barrelCoupling": {+ "drillVoidsRemoved": true,+ "model": "distributed-plated-wall",+ "platingUm": 25,+ "quadrature": "uniform-perimeter-32-samples-per-cell-minimum-128",+ "unresolvedWall": "nearest cells with copper on both faces (fallback: true on the connection)"+ },+ "board": {+ "cellMm": 0.2,+ "cols": 140,+ "copperLayers": [+ "F.Cu",+ "B.Cu"+ ],+ "copperUm": 35.0,+ "copperUmByLayer": {+ "B.Cu": 35.0,+ "F.Cu": 35.0,+ "In1.Cu": 35.0,+ "In2.Cu": 35.0,+ "In3.Cu": 35.0,+ "In4.Cu": 35.0+ },+ "description": "12 V to 5 V / 1 A buck (TI TPS54202 synchronous buck, 500 kHz), Altium Designer, 28 x 20 mm Adom molecule, 2 layers, medium machine pins on a 24 x 16 mm grid",+ "dielectricMm": [+ 1.53+ ],+ "heightMm": 20.0,+ "layers": [+ "F.Cu",+ "In1.Cu",+ "In2.Cu",+ "In3.Cu",+ "In4.Cu",+ "B.Cu"+ ],+ "name": "12 V to 5 V / 1 A buck",+ "rows": 100,+ "slotDielectricMm": [+ 0.306,+ 0.306,+ 0.306,+ 0.306,+ 0.306+ ],+ "stackupFrom": "board file (its stackup, else its thickness)",+ "thicknessMm": 1.6,+ "widthMm": 28.0,+ "x0": 0.0,+ "y0": -20.0+ },+ "chips": [+ {+ "airW": 0.011,+ "dielW": 0.014,+ "otherViaW": 0.071,+ "otherVias": 1,+ "planeW": 0.148,+ "reference": "U1",+ "riseC": 43.4,+ "riseMovingC": 23.2,+ "tabNet": "GND",+ "viaW": 0.007,+ "vias": 3,+ "viasWanted": 0,+ "watts": 0.25,+ "x": 15.1375,+ "y": -10.05+ },+ {+ "airW": 0.01,+ "dielW": 0.011,+ "otherViaW": 0.013,+ "otherVias": 0,+ "planeW": 0.086,+ "reference": "L1",+ "riseC": 37.6,+ "riseMovingC": 17.4,+ "tabNet": "VOUT",+ "viaW": 0.0,+ "vias": 1,+ "viasWanted": 0,+ "watts": 0.12,+ "x": 23.175,+ "y": -11.0+ }+ ],+ "fixPlan": [+ {+ "action": {+ "count": 1,+ "from": [+ 20.4,+ 0.0+ ],+ "insetMm": 0.6,+ "net": "GND",+ "pitchMm": 9.2,+ "points": [+ [+ 16.0,+ -0.6+ ]+ ],+ "to": [+ 12.0,+ 0.0+ ],+ "type": "add-vias"+ },+ "at": [+ 16.0,+ 0.0+ ],+ "do": "Add 1 ground via(s) along the edge (the action lists each point) from (20.4, 0.0) to (12.0, 0.0), one every 9.2 mm, about 0.6 mm in from the edge.",+ "kind": "stitching-gap",+ "severity": "low",+ "step": 1+ },+ {+ "action": {+ "count": 1,+ "from": [+ 7.6,+ -20.0+ ],+ "insetMm": 0.6,+ "net": "GND",+ "pitchMm": 9.2,+ "points": [+ [+ 11.2,+ -19.4+ ]+ ],+ "to": [+ 14.8,+ -20.0+ ],+ "type": "add-vias"+ },+ "at": [+ 11.2,+ -20.0+ ],+ "do": "Add 1 ground via(s) along the edge (the action lists each point) from (7.6, -20.0) to (14.8, -20.0), one every 9.2 mm, about 0.6 mm in from the edge.",+ "kind": "stitching-gap",+ "severity": "low",+ "step": 2+ },+ {+ "action": {+ "between": [+ "VIN",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J1.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 2.0,+ -14.0+ ],+ "do": "If J1 faces the outside world, add a TVS (low capacitance, for a signal) from VIN to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "severity": "low",+ "step": 3+ },+ {+ "action": {+ "between": [+ "EN",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J3.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 2.0,+ -6.0+ ],+ "do": "If J3 faces the outside world, add a TVS (low capacitance, for a signal) from EN to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "severity": "low",+ "step": 4+ },+ {+ "action": {+ "between": [+ "VOUT",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J4.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 26.0,+ -14.0+ ],+ "do": "If J4 faces the outside world, add a TVS (low capacitance, for a signal) from VOUT to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "severity": "low",+ "step": 5+ },+ {+ "action": {+ "between": [+ "VMON",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J6.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 26.0,+ -6.0+ ],+ "do": "If J6 faces the outside world, add a TVS (low capacitance, for a signal) from VMON to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "severity": "low",+ "step": 6+ },+ {+ "action": {+ "byMm": 0.7,+ "gap": {+ "blockingNet": "BOOT",+ "blockingPad": "C5.1",+ "from": [+ 13.9,+ -8.7+ ],+ "gapMm": 0.4,+ "joinedThroughVias": true,+ "pieceAreaMm2": 4.08,+ "to": [+ 13.9,+ -9.1+ ]+ },+ "layer": "F.Cu",+ "net": "GND",+ "orRotateDeg": 90,+ "pad": "1",+ "reference": "C5",+ "type": "move",+ "why": "join a split pour"+ },+ "at": [+ 13.9,+ -8.9+ ],+ "do": "Rotate C5 90° or move it about 0.7 mm so its 1 pad (BOOT) leaves the gap and GND's pour on F.Cu closes; re-pour and re-run.",+ "kind": "pour-fragmented",+ "severity": "low",+ "step": 7+ },+ {+ "action": {+ "at": [+ 2.6,+ -15.5+ ],+ "gap": {+ "blockingNet": "GND",+ "blockingPad": null,+ "from": [+ 2.9,+ -15.9+ ],+ "gapMm": 1.0,+ "joinedThroughVias": true,+ "pieceAreaMm2": 12.84,+ "to": [+ 2.3,+ -15.1+ ]+ },+ "layer": "F.Cu",+ "net": "GND",+ "type": "reroute",+ "why": "join a split pour"+ },+ "at": [+ 2.6,+ -15.5+ ],+ "do": "Reroute GND out of the 1.0 mm gap at (2.6, -15.5) on F.Cu so VIN's pour closes; re-pour and re-run.",+ "kind": "pour-fragmented",+ "severity": "low",+ "step": 8+ },+ {+ "action": {+ "connectors": [+ "J7",+ "J5",+ "J2"+ ],+ "type": "review",+ "what": "ground cabling"+ },+ "at": [+ 5.0,+ -7.0+ ],+ "do": "Return each cable's ground on its own connector and route paired wires together (twisted or adjacent), or tie the grounds at one point.",+ "kind": "ground-loop-risk",+ "severity": "low",+ "step": 9+ }+ ],+ "flow": {+ "cellMm": 0.2,+ "cols": 140,+ "file": "flow.bin",+ "jMax": 41.724795976395775,+ "layers": [+ "F.Cu",+ "In1.Cu",+ "In2.Cu",+ "In3.Cu",+ "In4.Cu",+ "B.Cu"+ ],+ "layout": "for each layer in order: jx, jy (A/mm², physical sense, +x right, +y down the board as KiCad), volt (V; NaN off copper or where the rail is unknown), net (index into nets, -1 off copper); each float32 little-endian, rows*cols, row-major from (x0, y0)",+ "method": "The DC solve per loaded net, signed: current enters at the source terminals and leaves at the sinks (a ground returns to its connector; the spec's `sources` names the part a net is fed from). Voltage = the net's rail at its anchor plus the solved IR drop; the rail comes from the spec's `voltages` or the net's name. A switching node is drawn as a tide between its rails at a slowed, stated rate.",+ "nets": [+ {+ "loaded": false,+ "name": "BOOT",+ "railV": null,+ "switching": null+ },+ {+ "loaded": false,+ "name": "EN",+ "railV": null,+ "switching": null+ },+ {+ "loaded": false,+ "name": "FB",+ "railV": null,+ "switching": null+ },+ {+ "loaded": false,+ "name": "FBM",+ "railV": null,+ "switching": null+ },+ {+ "amps": 1.0,+ "dropV": 0.001968493949830931,+ "ground": true,+ "loaded": true,+ "name": "GND",+ "note": null,+ "railV": 0.0,+ "sense": "from U1 to J2, J5, J7",+ "switching": null,+ "terminals": [+ {+ "amps": 0.3333333333333333,+ "pad": "1",+ "ref": "J7",+ "role": "sink",+ "x": 8.0,+ "y": -4.0+ },+ {+ "amps": 0.3333333333333333,+ "pad": "1",+ "ref": "J5",+ "role": "sink",+ "x": 26.0,+ "y": -10.0+ },+ {+ "amps": 0.3333333333333333,+ "pad": "1",+ "ref": "J2",+ "role": "sink",+ "x": 2.0,+ "y": -10.0+ },+ {+ "amps": 1.0,+ "pad": "1",+ "ref": "U1",+ "role": "source",+ "x": 15.1375,+ "y": -10.05+ }+ ],+ "vias": [+ {+ "amps": -0.0007620228620170931,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.9000000000000001,+ "y": -18.7+ },+ {+ "amps": -0.0008243033627465544,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.1,+ "y": -18.7+ },+ {+ "amps": 0.0012029904288980776,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.900000000000002,+ "y": -18.7+ },+ {+ "amps": 0.0011306007560924986,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.1,+ "y": -18.7+ },+ {+ "amps": -0.00028930251993460743,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.5,+ "y": -18.5+ },+ {+ "amps": -0.0007836648376480648,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.7000000000000002,+ "y": -18.5+ },+ {+ "amps": -0.0014012699968428126,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.3000000000000003,+ "y": -18.5+ },+ {+ "amps": -0.0006709529155104224,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.5,+ "y": -18.5+ },+ {+ "amps": 0.0006265561630450317,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.5,+ "y": -18.5+ },+ {+ "amps": 0.001614204775657306,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.700000000000003,+ "y": -18.5+ },+ {+ "amps": 0.0014319162228782932,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.3,+ "y": -18.5+ },+ {+ "amps": 0.0006044005096699953,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.5,+ "y": -18.5+ },+ {+ "amps": -0.0006221982702330122,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.5,+ "y": -18.3+ },+ {+ "amps": -0.0017699142497697496,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.5,+ "y": -18.3+ },+ {+ "amps": 0.0011724247268045972,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.5,+ "y": -18.3+ },+ {+ "amps": 0.0014473397960444057,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.5,+ "y": -18.3+ },+ {+ "amps": -0.00040569688443020473,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.3,+ "y": -18.1+ },+ {+ "amps": -0.0016209826967827753,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.7,+ "y": -18.1+ },+ {+ "amps": 0.00025774312156229506,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.3,+ "y": -18.1+ },+ {+ "amps": 0.0011387371360911845,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.700000000000003,+ "y": -18.1+ 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"F.Cu",+ "to": "B.Cu",+ "x": 3.9000000000000004,+ "y": -15.3+ },+ {+ "amps": -0.03686822379614985,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 4.1000000000000005,+ "y": -15.3+ },+ {+ "amps": 0.021267272449228766,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.9000000000000001,+ "y": -14.5+ },+ {+ "amps": 0.027110353200366397,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.1,+ "y": -14.5+ },+ {+ "amps": 0.049910593329119644,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.7000000000000002,+ "y": -14.3+ },+ {+ "amps": 0.12808764366359054,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.3000000000000003,+ "y": -14.3+ },+ {+ "amps": 0.008232743130902886,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.5,+ "y": -14.1+ },+ {+ "amps": 0.027408710560276054,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.5,+ "y": -14.1+ },+ {+ "amps": 0.007221948702731305,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.5,+ "y": -13.899999999999999+ },+ {+ "amps": 0.0216755081973726,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.5,+ "y": -13.899999999999999+ },+ {+ "amps": 0.025426653492528314,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.7000000000000002,+ "y": -13.7+ },+ {+ "amps": 0.05276101795279425,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.3000000000000003,+ "y": -13.7+ },+ {+ "amps": 0.007764612294172174,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 1.9000000000000001,+ "y": -13.5+ },+ {+ "amps": 0.010229716801836108,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 2.1,+ "y": -13.5+ }+ ],+ "voltKnown": false,+ "voltRange": [+ -0.0032285966054555037,+ 0.00013236604254739277+ ]+ },+ {+ "loaded": false,+ "name": "VMON",+ "railV": null,+ "switching": null+ },+ {+ "amps": 1.0,+ "dropV": 0.0005841295496793464,+ "ground": false,+ "loaded": true,+ "name": "VOUT",+ "note": null,+ "railV": null,+ "sense": "from J4 to L1",+ "switching": null,+ "terminals": [+ {+ "amps": 1.0,+ "pad": "1",+ "ref": "J4",+ "role": "source",+ "x": 26.0,+ "y": -14.0+ },+ {+ "amps": 1.0,+ "pad": "2",+ "ref": "L1",+ "role": "sink",+ "x": 23.175,+ "y": -11.0+ }+ ],+ "vias": [+ {+ "amps": 0.0010287342833585798,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 21.900000000000002,+ "y": -15.5+ },+ {+ "amps": 0.002374163834611437,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.1,+ "y": -15.5+ },+ {+ "amps": 0.0015084711194450968,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.3,+ "y": -15.5+ },+ {+ "amps": -0.0004620827223841307,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 21.900000000000002,+ "y": -15.3+ },+ {+ "amps": 0.0009209856829690336,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.3,+ "y": -15.3+ },+ {+ "amps": -0.0016077830220165364,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 21.900000000000002,+ "y": -15.1+ },+ {+ "amps": -0.0024256475856689703,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.1,+ "y": -15.1+ },+ {+ "amps": -0.000658701112190906,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.3,+ "y": -15.1+ },+ {+ "amps": -0.010337450048054848,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.900000000000002,+ "y": -14.5+ },+ {+ "amps": -0.009629733556306804,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.1,+ "y": -14.5+ },+ {+ "amps": -0.045618442716477164,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.700000000000003,+ "y": -14.3+ },+ {+ "amps": -0.03338994370534055,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.3,+ "y": -14.3+ },+ {+ "amps": -0.012874134665625626,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.5,+ "y": -14.1+ },+ {+ "amps": -0.008019780603944319,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.5,+ "y": -14.1+ },+ {+ "amps": -0.013293944730872352,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.5,+ "y": -13.899999999999999+ },+ {+ "amps": -0.008337298985979081,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.5,+ "y": -13.899999999999999+ },+ {+ "amps": -0.052087219932118435,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.700000000000003,+ "y": -13.7+ },+ {+ "amps": -0.038668519082640365,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.3,+ "y": -13.7+ },+ {+ "amps": -0.012499609895131505,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.900000000000002,+ "y": -13.5+ },+ {+ "amps": -0.013308438349042368,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 26.1,+ "y": -13.5+ },+ {+ "amps": -0.0011442169750410618,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.700000000000003,+ "y": -10.9+ },+ {+ "amps": 0.002945958435889199,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.900000000000002,+ "y": -10.9+ },+ {+ "amps": -0.006601893372608572,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.5,+ "y": -10.7+ },+ {+ "amps": 0.001877049271751872,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 25.1,+ "y": -10.7+ },+ {+ "amps": -0.010635007944950129,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.700000000000003,+ "y": -10.5+ },+ {+ "amps": -0.006876320786319861,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.900000000000002,+ "y": -10.5+ },+ {+ "amps": 0.004506035220093775,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.5,+ "y": -7.299999999999999+ },+ {+ "amps": 0.004712740790172995,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.700000000000003,+ "y": -7.299999999999999+ },+ {+ "amps": 0.002400234302770221,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.3,+ "y": -7.1+ },+ {+ "amps": 0.0027407705296955223,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.900000000000002,+ "y": -7.1+ },+ {+ "amps": 0.0029738923364980834,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.5,+ "y": -6.899999999999999+ },+ {+ "amps": 0.003100758546302981,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 24.700000000000003,+ "y": -6.899999999999999+ },+ {+ "amps": -0.00010883814759014196,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.700000000000003,+ "y": -5.1+ },+ {+ "amps": -0.00011867112175821175,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.5,+ "y": -4.899999999999999+ },+ {+ "amps": -0.00010089563562392101,+ "from": "F.Cu",+ "to": "B.Cu",+ "x": 22.700000000000003,+ "y": -4.699999999999999+ }+ ],+ "voltKnown": false,+ "voltRange": [+ -0.000460558633951238,+ 0.0001235709157281084+ ]+ }+ ],+ "rows": 100,+ "topRailV": 0.0,+ "voltMax": 0.0019119768499298668,+ "voltMin": -0.00005651709990106405,+ "x0": 0.0,+ "y0": -20.0+ },+ "fragments": [+ {+ "areasMm2": [+ 286.48,+ 4.08+ ],+ "isolated": 0,+ "joinedThroughVias": 1,+ "layer": "F.Cu",+ "nearestGap": {+ "blockingNet": "BOOT",+ "blockingPad": "C5.1",+ "from": [+ 13.9,+ -8.7+ ],+ "gapMm": 0.4,+ "joinedThroughVias": true,+ "pieceAreaMm2": 4.08,+ "to": [+ 13.9,+ -9.1+ ]+ },+ "net": "GND",+ "pieces": 2+ },+ {+ "areasMm2": [+ 456.52+ ],+ "layer": "B.Cu",+ "net": "GND",+ "pieces": 1+ },+ {+ "areasMm2": [+ 20.08+ ],+ "layer": "F.Cu",+ "net": "SW",+ "pieces": 1+ },+ {+ "areasMm2": [+ 74.36,+ 12.84+ ],+ "isolated": 0,+ "joinedThroughVias": 1,+ "layer": "F.Cu",+ "nearestGap": {+ "blockingNet": "GND",+ "blockingPad": null,+ "from": [+ 2.9,+ -15.9+ ],+ "gapMm": 1.0,+ "joinedThroughVias": true,+ "pieceAreaMm2": 12.84,+ "to": [+ 2.3,+ -15.1+ ]+ },+ "net": "VIN",+ "pieces": 2+ },+ {+ "areasMm2": [+ 75.12+ ],+ "layer": "F.Cu",+ "net": "VOUT",+ "pieces": 1+ }+ ],+ "heat": {+ "budgetC": 55.0,+ "jouleW": 0.003,+ "movingAirWPerM2K": 25.0,+ "peakRiseC": 49.182159423828125,+ "peakRiseMovingC": 29.02578353881836,+ "sourcesModelled": 2,+ "status": "parts modelled",+ "stillAirWPerM2K": 10.0,+ "tabW": 0.37+ },+ "heatsinks": [],+ "inputIdentity": {+ "algorithm": "sha256",+ "board": "746b14c3282d4458d4423180270cbbfad738133ef256cd511fdcd95e6fa4fee5",+ "solverVersion": "0.7.20",+ "spec": "7e3eb04a7a0049626b542e9f8261d4ac9f0ff21322a5f1735f88a369e0049502"+ },+ "issues": [+ {+ "action": {+ "connectors": [+ "J7",+ "J5",+ "J2"+ ],+ "type": "review",+ "what": "ground cabling"+ },+ "at": [+ 5.0,+ -7.0+ ],+ "fix": "Return each cable's ground on its own connector and route paired wires together (twisted or adjacent), or tie the grounds at one point.",+ "kind": "ground-loop-risk",+ "layer": "F.Cu",+ "net": "GND",+ "reference": null,+ "severity": "low",+ "what": "3 connectors carry GND off the board (J7, J5, J2): cables that meet off the board close a loop"+ },+ {+ "action": {+ "count": 1,+ "from": [+ 20.4,+ 0.0+ ],+ "insetMm": 0.6,+ "net": "GND",+ "pitchMm": 9.2,+ "points": [+ [+ 16.0,+ -0.6+ ]+ ],+ "to": [+ 12.0,+ 0.0+ ],+ "type": "add-vias"+ },+ "at": [+ 16.0,+ 0.0+ ],+ "fix": "Add 1 ground via(s) along the edge (the action lists each point) from (20.4, 0.0) to (12.0, 0.0), one every 9.2 mm, about 0.6 mm in from the edge.",+ "kind": "stitching-gap",+ "layer": "F.Cu",+ "net": "GND",+ "reference": null,+ "severity": "low",+ "what": "GND: 8.8 mm of board edge with no ground via within 4.6 mm"+ },+ {+ "action": {+ "count": 1,+ "from": [+ 7.6,+ -20.0+ ],+ "insetMm": 0.6,+ "net": "GND",+ "pitchMm": 9.2,+ "points": [+ [+ 11.2,+ -19.4+ ]+ ],+ "to": [+ 14.8,+ -20.0+ ],+ "type": "add-vias"+ },+ "at": [+ 11.2,+ -20.0+ ],+ "fix": "Add 1 ground via(s) along the edge (the action lists each point) from (7.6, -20.0) to (14.8, -20.0), one every 9.2 mm, about 0.6 mm in from the edge.",+ "kind": "stitching-gap",+ "layer": "F.Cu",+ "net": "GND",+ "reference": null,+ "severity": "low",+ "what": "GND: 7.6 mm of board edge with no ground via within 4.6 mm"+ },+ {+ "action": {+ "between": [+ "VIN",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J1.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 2.0,+ -14.0+ ],+ "fix": "If J1 faces the outside world, add a TVS (low capacitance, for a signal) from VIN to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "layer": "F.Cu",+ "net": "VIN",+ "reference": "J1",+ "severity": "low",+ "what": "J1 pin 1 (VIN): no protection diode from VIN to GND"+ },+ {+ "action": {+ "between": [+ "EN",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J3.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 2.0,+ -6.0+ ],+ "fix": "If J3 faces the outside world, add a TVS (low capacitance, for a signal) from EN to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "layer": "F.Cu",+ "net": "EN",+ "reference": "J3",+ "severity": "low",+ "what": "J3 pin 1 (EN): no protection diode from EN to GND"+ },+ {+ "action": {+ "between": [+ "VOUT",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J4.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 26.0,+ -14.0+ ],+ "fix": "If J4 faces the outside world, add a TVS (low capacitance, for a signal) from VOUT to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "layer": "F.Cu",+ "net": "VOUT",+ "reference": "J4",+ "severity": "low",+ "what": "J4 pin 1 (VOUT): no protection diode from VOUT to GND"+ },+ {+ "action": {+ "between": [+ "VMON",+ "GND"+ ],+ "maxDistMm": 3.0,+ "nearPin": "J6.1",+ "signal": true,+ "type": "add-part",+ "what": "TVS diode"+ },+ "at": [+ 26.0,+ -6.0+ ],+ "fix": "If J6 faces the outside world, add a TVS (low capacitance, for a signal) from VMON to GND within 3 mm of the pin, before any chip.",+ "kind": "esd-unprotected",+ "layer": "F.Cu",+ "net": "VMON",+ "reference": "J6",+ "severity": "low",+ "what": "J6 pin 1 (VMON): no protection diode from VMON to GND"+ },+ {+ "action": {+ "byMm": 0.7,+ "gap": {+ "blockingNet": "BOOT",+ "blockingPad": "C5.1",+ "from": [+ 13.9,+ -8.7+ ],+ "gapMm": 0.4,+ "joinedThroughVias": true,+ "pieceAreaMm2": 4.08,+ "to": [+ 13.9,+ -9.1+ ]+ },+ "layer": "F.Cu",+ "net": "GND",+ "orRotateDeg": 90,+ "pad": "1",+ "reference": "C5",+ "type": "move",+ "why": "join a split pour"+ },+ "at": [+ 13.9,+ -8.9+ ],+ "fix": "Rotate C5 90° or move it about 0.7 mm so its 1 pad (BOOT) leaves the gap and GND's pour on F.Cu closes; re-pour and re-run.",+ "kind": "pour-fragmented",+ "layer": "F.Cu",+ "net": "GND",+ "reference": "C5",+ "severity": "low",+ "what": "GND: its pour on F.Cu is in 2 pieces (1 joined through vias, 0 isolated); the nearest one (4.1 mm², joined only through the net's vias on other layers) is 0.4 mm from the main piece"+ },+ {+ "action": {+ "at": [+ 2.6,+ -15.5+ ],+ "gap": {+ "blockingNet": "GND",+ "blockingPad": null,+ "from": [+ 2.9,+ -15.9+ ],+ "gapMm": 1.0,+ "joinedThroughVias": true,+ "pieceAreaMm2": 12.84,+ "to": [+ 2.3,+ -15.1+ ]+ },+ "layer": "F.Cu",+ "net": "GND",+ "type": "reroute",+ "why": "join a split pour"+ },+ "at": [+ 2.6,+ -15.5+ ],+ "fix": "Reroute GND out of the 1.0 mm gap at (2.6, -15.5) on F.Cu so VIN's pour closes; re-pour and re-run.",+ "kind": "pour-fragmented",+ "layer": "F.Cu",+ "net": "VIN",+ "reference": null,+ "severity": "low",+ "what": "VIN: its pour on F.Cu is in 2 pieces (1 joined through vias, 0 isolated); the nearest one (12.8 mm², joined only through the net's vias on other layers) is 1.0 mm from the main piece"+ }+ ],+ "log": [+ "GND: 1 A, 2 layer(s), 1322 iterations, residual 9.8e-8",+ "SW: 1 A, 1 layer(s), 144 iterations, residual 7.6e-8",+ "VIN: 0.6 A, 2 layer(s), 439 iterations, residual 8.9e-8",+ "VOUT: 1 A, 2 layer(s), 744 iterations, residual 9.1e-8",+ "heat, still air: 858 iterations, residual 9.7e-8",+ "heat, moving air: 819 iterations"+ ],+ "method": "Copper fraction per cell from the board's filled polygons, tracks, pads and vias, drill holes left empty; DC conduction per loaded net between its terminals (σ 5.8e4 S/mm × thickness), each via and plated pad barrel joining its layers around its wall; heat: the board's 2 copper layer(s) (F.Cu, B.Cu) coupled through the dielectric and every via and plated pad barrel, copper 0.40 W/mm·K, FR4 0.3/0.6 W/m·K, 10 (still) or 25 (moving) W/m²K to the air on both faces; one steady-state solve each. Optional rectangular heatsinks use a 3D finite-volume conducting block with specified conductivity, contact resistance and air loss on exposed faces. Copper thickness may differ by layer; Joule heat is deposited on its source layer. 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[]+ },+ "rails": [],+ "reference": [+ {+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "VOUT",+ "overSupplyMm": 0.0,+ "overVoidMm": 49.2,+ "supplyPlane": null,+ "unreferencedMm2": 9.8,+ "unreferencedPct": 12.6+ },+ {+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "VIN",+ "overSupplyMm": 0.0,+ "overVoidMm": 11.6,+ "supplyPlane": null,+ "unreferencedMm2": 2.3,+ "unreferencedPct": 3.8+ },+ {+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "EN",+ "overSupplyMm": 0.0,+ "overVoidMm": 6.0,+ "supplyPlane": null,+ "unreferencedMm2": 1.2,+ "unreferencedPct": 27.0+ },+ {+ "layers": [+ "F.Cu"+ ],+ "net": "FB",+ "overSupplyMm": 0.0,+ "overVoidMm": 2.4,+ "supplyPlane": null,+ "unreferencedMm2": 0.5,+ "unreferencedPct": 42.9+ },+ {+ "layers": [],+ "net": "LED",+ "overSupplyMm": 0.0,+ "overVoidMm": 0.0,+ "supplyPlane": null,+ "unreferencedMm2": 0.0,+ "unreferencedPct": 0.0+ },+ {+ "layers": [+ "F.Cu"+ ],+ "net": "SW",+ "overSupplyMm": 0.0,+ "overVoidMm": 0.2,+ "supplyPlane": null,+ "unreferencedMm2": 0.0,+ "unreferencedPct": 0.8+ },+ {+ "layers": [],+ "net": "VMON",+ "overSupplyMm": 0.0,+ "overVoidMm": 0.0,+ "supplyPlane": null,+ "unreferencedMm2": 0.0,+ "unreferencedPct": 0.0+ }+ ],+ "stageFeeds": []+ },+ "scales": {+ "jHi": 41.068702697753906,+ "jMax": 41.068702697753906,+ "qHi": 0.07368503510951996,+ "qMax": 0.07368503510951996,+ "tHi": 49.182159423828125,+ "tMax": 49.182159423828125,+ "tMovingMax": 29.02578353881836+ },+ "seconds": 1.2,+ "signals": {+ "capacitance": [],+ "differentialPairs": [],+ "method": "Screening estimates, not signal-integrity signoff. Outer-layer equal-width microstrip only; sampled reference coverage and parallel partner gaps. No solder mask, pads, packages, loss, dispersion, crosstalk, S-parameters or eye diagrams.",+ "sampleMm": 0.1,+ "sources": [+ "https://www.ti.com/lit/an/slva531a/slva531a.pdf",+ "https://www.ti.com/seclit/eb/slyw038c/slyw038c.pdf"+ ]+ },+ "silk": null,+ "source": {+ "board": "/home/adom/project/tps54202-buck/aiflow-run/board-live.kicad_pcb",+ "spec": "./aiflow-run/altium/spec.json"+ },+ "terminalAssignments": {+ "GND": {+ "mode": "heuristic",+ "pins": null+ },+ "SW": {+ "mode": "heuristic",+ "pins": null+ },+ "VIN": {+ "mode": "heuristic",+ "pins": null+ },+ "VOUT": {+ "mode": "heuristic",+ "pins": null+ }+ },+ "textures": [+ "copper-F_Cu.png",+ "J-F_Cu.png",+ "q-F_Cu.png",+ "T-F_Cu.png",+ "Tm-F_Cu.png",+ "q-EN-F_Cu.png",+ "q-GND-F_Cu.png",+ "q-SW-F_Cu.png",+ "q-VIN-F_Cu.png",+ "q-VOUT-F_Cu.png",+ "J-GND-F_Cu.png",+ "J-SW-F_Cu.png",+ "J-VIN-F_Cu.png",+ "J-VOUT-F_Cu.png",+ "copper-In1_Cu.png",+ "J-In1_Cu.png",+ "q-In1_Cu.png",+ "T-In1_Cu.png",+ "Tm-In1_Cu.png",+ "q-EN-In1_Cu.png",+ "q-GND-In1_Cu.png",+ "q-SW-In1_Cu.png",+ "q-VIN-In1_Cu.png",+ "q-VOUT-In1_Cu.png",+ "J-GND-In1_Cu.png",+ "J-SW-In1_Cu.png",+ "J-VIN-In1_Cu.png",+ "J-VOUT-In1_Cu.png",+ "copper-In2_Cu.png",+ "J-In2_Cu.png",+ "q-In2_Cu.png",+ "T-In2_Cu.png",+ "Tm-In2_Cu.png",+ "q-EN-In2_Cu.png",+ "q-GND-In2_Cu.png",+ "q-SW-In2_Cu.png",+ "q-VIN-In2_Cu.png",+ "q-VOUT-In2_Cu.png",+ "J-GND-In2_Cu.png",+ "J-SW-In2_Cu.png",+ "J-VIN-In2_Cu.png",+ "J-VOUT-In2_Cu.png",+ "copper-In3_Cu.png",+ "J-In3_Cu.png",+ "q-In3_Cu.png",+ "T-In3_Cu.png",+ "Tm-In3_Cu.png",+ "q-EN-In3_Cu.png",+ "q-GND-In3_Cu.png",+ "q-SW-In3_Cu.png",+ "q-VIN-In3_Cu.png",+ "q-VOUT-In3_Cu.png",+ "J-GND-In3_Cu.png",+ "J-SW-In3_Cu.png",+ "J-VIN-In3_Cu.png",+ "J-VOUT-In3_Cu.png",+ "copper-In4_Cu.png",+ "J-In4_Cu.png",+ "q-In4_Cu.png",+ "T-In4_Cu.png",+ "Tm-In4_Cu.png",+ "q-EN-In4_Cu.png",+ "q-GND-In4_Cu.png",+ "q-SW-In4_Cu.png",+ "q-VIN-In4_Cu.png",+ "q-VOUT-In4_Cu.png",+ "J-GND-In4_Cu.png",+ "J-SW-In4_Cu.png",+ "J-VIN-In4_Cu.png",+ "J-VOUT-In4_Cu.png",+ "copper-B_Cu.png",+ "J-B_Cu.png",+ "q-B_Cu.png",+ "T-B_Cu.png",+ "Tm-B_Cu.png",+ "q-EN-B_Cu.png",+ "q-GND-B_Cu.png",+ "q-SW-B_Cu.png",+ "q-VIN-B_Cu.png",+ "q-VOUT-B_Cu.png",+ "J-GND-B_Cu.png",+ "J-SW-B_Cu.png",+ "J-VIN-B_Cu.png",+ "J-VOUT-B_Cu.png"+ ],+ "thermalConvergence": {+ "movingResidual": 9.762901430800208e-8,+ "stillResidual": 9.746817952387188e-8+ },+ "vias": [+ {+ "drill": 0.3,+ "net": "GND",+ "size": 0.6,+ "x": 17.55,+ "y": -13.55+ },+ {+ "drill": 0.3,+ "net": "GND",+ "size": 0.6,+ "x": 15.7,+ "y": -9.25+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 8.2,+ "y": -14.5+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 22.7,+ "y": -4.9+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 20.1,+ "y": -4.6+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 24.8,+ "y": -10.7+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 24.6,+ "y": -7.1+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 22.1,+ "y": -15.3+ },+ {+ "drill": 0.4,+ "net": "VOUT",+ "size": 0.8,+ "x": 7.8,+ "y": -12.9+ },+ {+ "drill": 0.4,+ "net": "VIN",+ "size": 0.8,+ "x": 2.9,+ "y": -8.8+ },+ {+ "drill": 0.4,+ "net": "VIN",+ "size": 0.8,+ "x": 3.3,+ "y": -7.0+ },+ {+ "drill": 0.4,+ "net": "VIN",+ "size": 0.8,+ "x": 4.0,+ "y": -15.6+ },+ {+ "drill": 0.3,+ "net": "EN",+ "size": 0.6,+ "x": 5.9,+ "y": -7.6+ },+ {+ "drill": 0.3,+ "net": "EN",+ "size": 0.6,+ "x": 12.9,+ "y": -11.0+ },+ {+ "drill": 0.4,+ "net": "GND",+ "size": 0.8,+ "x": 16.1,+ "y": -14.5+ },+ {+ "drill": 0.4,+ "net": "GND",+ "size": 0.8,+ "x": 10.1,+ "y": -10.6+ },+ {+ "drill": 0.4,+ "net": "GND",+ "size": 0.8,+ "x": 16.3,+ "y": -9.6+ },+ {+ "drill": 0.4,+ "net": "GND",+ "size": 0.8,+ "x": 18.7,+ "y": -8.4+ },+ {+ "drill": 0.3,+ "net": "GND",+ "size": 0.6,+ "x": 14.0,+ "y": -9.4+ },+ {+ "drill": 0.3,+ "net": "GND",+ "size": 0.6,+ "x": 11.5,+ "y": -11.5+ }+ ]+}
aiflow/prompt.txtadded+1@@ -0,0 +1 @@+Use adom-aiflow to design a 12 V to 5 V, 1 A buck converter using the TPS54202, and build it as a complete board in Altium Designer.
aiflow/requirements.jsonadded+10@@ -0,0 +1,10 @@+{+ "title": "12 V to 5 V, 1 A buck converter (TPS54202), Altium Designer board",+ "input": {"nominalV": 12.0, "minV": 9.0, "maxV": 16.0, "note": "9 and 16 V are an assumed design margin around the 12 V brief"},+ "output": {"V": 5.0, "A": 1.0, "toleranceSelfSetPct": 3},+ "regulator": "TPS54202DDCR",+ "fab": {"target": "fab", "rules": "3rdPartyFab", "layers": 2},+ "sourcing": {"profile": "fab"},+ "tool": "Altium Designer 26",+ "form": "Adom molecule: 28 x 20 mm, four medium machine pins, VIN/GND/EN contacts left, VOUT/GND/VMON right"+}
aiflow/spec.jsonadded+376@@ -0,0 +1,376 @@+{+ "board": "12 V to 5 V / 1 A buck (TI TPS54202 synchronous buck, 500 kHz), Altium Designer, 28 x 20 mm Adom molecule, 2 layers, medium machine pins on a 24 x 16 mm grid",+ "chains": [+ {+ "direction": "down",+ "refs": [+ "R1",+ "R2",+ "C9"+ ]+ }+ ],+ "clearance": 0.15,+ "copperNote": "1 oz (35 um) finished outer copper, the weight the 3rdPartyFab rules pack is specified for; order the board as 1 oz. Rev A assumed 0.5 oz (17.5 um) as a self-set conservative case, but at U1's 0.95 mm pin pitch the SW copper at pin 2 cannot exceed about 0.9 mm, so 1 A cannot meet the 60 A/mm2 screen at 0.5 oz in any layout (65 A/mm2 there). The 60 A/mm2 limit is unchanged.",+ "copperUm": 35,+ "edgeClearance": 0.3,+ "fab": {+ "rules": "adom-3rdpartyfab",+ "target": "fab",+ "copperOz": 1+ },+ "fabNote": "3rd party fab (3rdPartyFab rules pack, loaded by `rules use`), 2-layer, 1.6 mm FR4",+ "fixedRefs": [+ "MP1",+ "MP2",+ "MP3",+ "MP4",+ "J1",+ "J2",+ "J3",+ "J4",+ "J5",+ "J6"+ ],+ "fixedRefsNote": "the molecule interface: four corner machine pins (GND) and six contacts on the 2 mm grid; everything that connects to the molecule depends on these positions",+ "frameNote": "Coordinates are in the Altium board's frame (reference board shifted by (-98, -102)).",+ "hot": {+ "L1": {+ "tabNet": "VOUT",+ "watts": 0.12+ },+ "U1": {+ "note": "SOT-23-6 has no exposed pad: heat leaves through the pins, mostly GND (pin 1, low-side source) and VIN (pin 3)",+ "tabNet": "GND",+ "watts": 0.25+ }+ },+ "hotMaxRiseC": 55,+ "hotMaxRiseNote": "Approved 2026-09-29 (junction-based): the budget is the pin/tab rise in STILL air. U1 +44 C at its GND pin; psi_JB 33.7 C/W x 0.25 W adds about 8 C to the junction, so Tj is about ambient + 52 C: 92 C at a 40 C ambient, 33 C under the 125 C rating. L1 +41 C is inside its -40..+125 C rating including self-heating. In moving air (25 W/m2K) both are under 30 C (U1 +24, L1 +21). A 28 x 20 mm board losing 0.37 W to still air averages about +33 C even with perfect copper, so 30 C still air is area-limited, not layout-limited: adding 8 more GND vias at the nearest free spots (2.6 to 3.8 mm from U1.1) changed U1 by 0 C in the Fields solve, so they were not added.",+ "hotNote": "U1: I^2R at the hot Rds(on) (1.4 x 148 / 78 mOhm) over the duty at 12 V: 0.15 W, plus about 0.09 W switching (15 ns edges, 500 kHz) and gate drive: 0.25 W. L1: 1.01 A RMS squared x 118 mOhm max DCR = 0.12 W.",+ "inheritedErrors": 0,+ "kelvin": {+ "R1.1": "C6.1",+ "R3.2": "U1.1"+ },+ "kelvinNote": "datasheet 7.4.1: the feedback divider's ground returns to the IC GND pin on its own trace, and the top of the divider senses VOUT at the output capacitor, not along the load current path",+ "loads": {+ "GND": {+ "amps": 1.0,+ "maxRiseC": 10+ },+ "SW": {+ "amps": 1.0,+ "maxRiseC": 10+ },+ "VIN": {+ "amps": 0.6,+ "maxRiseC": 10+ },+ "VOUT": {+ "amps": 1.0,+ "maxRiseC": 10+ }+ },+ "loadsNote": "VIN is the input current at the 9 V low end of the range (5 W / 0.93 / 9 V = 0.6 A); SW carries the inductor RMS current, 1.01 A",+ "midNets": {+ "BOOT": [+ 0.3,+ 0.2+ ]+ },+ "molecule": {+ "cornerPinsNet": "GND",+ "edgeMarginMm": 2,+ "gridMm": 2,+ "pin": "medium"+ },+ "notPoured": [+ "BOOT",+ "FB",+ "FBM",+ "EN",+ "VMON",+ "LED"+ ],+ "notPouredNote": "bootstrap (dv/dt), the feedback network (high impedance, keep it small and away from SW), the enable and monitor dividers; SW only as the small patch above",+ "planeUnder": [+ {+ "layer": "B.Cu",+ "name": "GND under the input hot loop",+ "net": "GND",+ "polygon": [+ [+ 13.5,+ -19.1+ ],+ [+ 18.4,+ -19.1+ ],+ [+ 18.4,+ -9.4+ ],+ [+ 14.1,+ -9.4+ ],+ [+ 14.1,+ -12.7+ ],+ [+ 13.5,+ -12.7+ ]+ ]+ },+ {+ "layer": "F.Cu",+ "net": "SW",+ "name": "SW node reserved on F.Cu (U1.2 to L1.1, the C5 bootstrap leg above U1's GND pocket, TP1)",+ "polygon": [+ [+ 14.3,+ -8.15+ ],+ [+ 18.0,+ -8.15+ ],+ [+ 18.0,+ -9.1+ ],+ [+ 20.1,+ -9.1+ ],+ [+ 20.1,+ -12.9+ ],+ [+ 16.6,+ -12.9+ ],+ [+ 15.85,+ -11.48+ ],+ [+ 15.3,+ -11.48+ ],+ [+ 15.3,+ -10.55+ ],+ [+ 17.0,+ -10.55+ ],+ [+ 17.0,+ -8.85+ ],+ [+ 14.3,+ -8.85+ ]+ ]+ },+ {+ "layer": "F.Cu",+ "net": "GND",+ "name": "U1 GND pocket on F.Cu (pin 1 to its two stitch vias)",+ "polygon": [+ [+ 14.4,+ -9.05+ ],+ [+ 16.8,+ -9.05+ ],+ [+ 16.8,+ -10.45+ ],+ [+ 14.4,+ -10.45+ ]+ ]+ }+ ],+ "planeUnderNote": "the input hot loop runs from C2/C3/C4 to U1 VIN (pin 3) and GND (pin 1), all on the right of U1; B.Cu under it stays GND so the loop's return images directly beneath it. The polygon covers the three input caps and narrows to U1 pins 1 and 3 below y 89.3, leaving U1's left pins (FB, EN, BOOT) a way down to B.Cu.",+ "planes": {},+ "pours": [+ {+ "connection": "thermal",+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "name": "GND both layers",+ "net": "GND",+ "outline": true,+ "priority": 0,+ "thermalBridge": 0.35,+ "thermalGap": 0.25+ },+ {+ "connection": "solid",+ "layers": [+ "F.Cu"+ ],+ "name": "VIN input loop F.Cu",+ "net": "VIN",+ "priority": 2,+ "polygon": [+ [+ 3.0,+ -19.3+ ],+ [+ 16.3,+ -19.3+ ],+ [+ 16.3,+ -11.15+ ],+ [+ 0.85,+ -11.15+ ],+ [+ 0.85,+ -16.6+ ],+ [+ 3.0,+ -16.6+ ]+ ],+ "note": "explicit outline (was around J1, C1-C4, U1.3 + 0.5 mm): trimmed off the board-edge strip beside MP3, where it left a 0.09 mm sliver"+ },+ {+ "around": [+ "L1.2",+ "C6.1",+ "C7.1",+ "C8.1",+ "J4",+ "TP3"+ ],+ "connection": "solid",+ "layers": [+ "F.Cu"+ ],+ "margin": 0.5,+ "name": "VOUT output F.Cu",+ "net": "VOUT",+ "priority": 2+ },+ {+ "connection": "solid",+ "layers": [+ "F.Cu"+ ],+ "name": "SW node patch F.Cu (U1.2 to L1.1, squared clear of U1's GND pocket)",+ "net": "SW",+ "polygon": [+ [+ 15.3,+ -11.48+ ],+ [+ 15.85,+ -11.48+ ],+ [+ 16.6,+ -12.9+ ],+ [+ 20.1,+ -12.9+ ],+ [+ 20.1,+ -9.1+ ],+ [+ 17.0,+ -9.1+ ],+ [+ 17.0,+ -10.55+ ],+ [+ 15.3,+ -10.55+ ]+ ],+ "priority": 3+ }+ ],+ "poursNote": "The input hot loop (C2/C3/C4 -> U1 VIN -> U1 GND -> C GND) stays on F.Cu over an unbroken B.Cu GND; SW is a short wide trace only, never a pour, to keep the switching node's area (and its radiated field) small. Rev 2 (after the Fields solve): a small solid SW patch between U1.2 and L1.1 removes the 0.27 mm neck while keeping the node's area small; U1's GND pin gets a solid connection and three thermal vias into the B.Cu ground plane (it is the IC's main heat path); the inductor pads connect solid.",+ "requireEvidence": [+ "calcs",+ "simulation"+ ],+ "solidAt": [+ "U1.1",+ "U1.3",+ "L1.1",+ "L1.2"+ ],+ "sourcing": {+ "profile": "fab"+ },+ "stitchVias": [+ {+ "net": "GND",+ "x": 15.7,+ "y": -9.25,+ "size": 0.6,+ "drill": 0.3+ },+ {+ "net": "GND",+ "x": 17.55,+ "y": -13.55,+ "size": 0.6,+ "drill": 0.3+ }+ ],+ "stitchViasNote": "GND via at (15.7,-9.25) in the F.Cu pocket beside U1 pin 1, next to the routed pocket via at (16.3,-9.6): pin 1's heat and return path into the B.Cu plane, no via in the SOT-23 pad; one more beside C4.2.",+ "wideNets": {+ "GND": [+ 0.8,+ 0.5,+ 0.3+ ],+ "SW": [+ 0.8,+ 0.5,+ 0.3+ ],+ "VIN": [+ 0.8,+ 0.5,+ 0.3+ ],+ "VOUT": [+ 0.8,+ 0.5,+ 0.3+ ]+ },+ "planeUnderSwNote": "Rev B routing: the first route wrapped SW round U1 pin 1 (GND), cutting the pin off from the F.Cu GND pour (Fields: 202 A/mm2 neck). SW is reserved to a band above the pocket and the patch below it; the pocket beside pin 1 is reserved for GND."+}
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altium/Buck12V5V.PrjPcbadded+20@@ -0,0 +1,20 @@+[Design] +Version=1.0 +HierarchyMode=0 +OutputPath=Project Outputs for Buck12V5V +LogFolderPath=Project Logs for Buck12V5V + +[Document1] +DocumentPath=Buck12V5V.SchDoc + +[Document2] +DocumentPath=Buck12V5V.PcbDoc + +[Document3] +DocumentPath=library\Buck12V5V.SchLib + +[Document4] +DocumentPath=library\Buck12V5V.PcbLib + +[Document5] +DocumentPath=Buck12V5V.Manufacturing.OutJob
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design/bom.csvadded+41@@ -0,0 +1,41 @@+ref,value,function,mpn,manufacturer,package,source,vendor_pn,stock_checked_2026-10-16,note +U1,TPS54202DDCR,sync buck 4.5-28 V 2 A 500 kHz,TPS54202DDCR,Texas Instruments,SOT-23-6 (DDC),Mouser,595-TPS54202DDCR,0 (Mouser API: Unknown; re-check before order),thin stock; order early for builds beyond prototypes +L1,15uH,output inductor,AMPLH5030S-150MT,Abracon,5.6x5.2x2.8 mm (datasheet p3; 5.7x5.3x2.8 max),Mouser,815-AMPLH5030S-150T,1577,Isat 3.7 A / Irms 3.5 A (datasheet p2) >= 2.5 A HS limit min; DCR 98 typ / 118 max mOhm +C1,47uF 35V,input bulk (cable damping),EEE-FK1V470P,Panasonic,SMD alu 6.3x5.8 (D),Mouser,667-EEE-FK1V470P,97980,ESR damps cable L against ceramics +C2,10uF 25V X7R,input ceramic,CC1206KKX7R8BB106,Yageo,1206,Mouser,603-CC126KKX7R8BB106,"0 in stock, 300797 on order (Mouser API)", +C3,10uF 25V X7R,input ceramic,CC1206KKX7R8BB106,Yageo,1206,Mouser,603-CC126KKX7R8BB106,"0 in stock, 300797 on order (Mouser API)", +C4,100nF 50V X7R,VIN pin HF bypass,0603B104J500CT,Walsin,0603,Adom stock,,,closest to VIN/GND pins +C5,100nF 50V X7R,BOOT-SW,0603B104J500CT,Walsin,0603,Adom stock,,, +C6,22uF 10V X5R,output ceramic,CL21A226MPQNNNE,Samsung,0805,Adom stock,,,~55% effective at 5 V bias +C7,22uF 10V X5R,output ceramic,CL21A226MPQNNNE,Samsung,0805,Adom stock,,, +C8,22uF 10V X5R,output ceramic,CL21A226MPQNNNE,Samsung,0805,Adom stock,,, +C9,68pF C0G,feed-forward across Rtop,0402N680J500CT,Walsin,0402,Adom stock,,,chosen by ngspice loop sweep (fc ~29 kHz) +R1,68k,FB top (series part 1),CR0402-FX-6802GLF,Bourns,0402,Adom stock,,,Rtop = R1 + R2 = 73.6k +R2,5.6k,FB top (series part 2),CR0402-FX-5601GLF,Bourns,0402,Adom stock,,, +R3,10k,FB bottom,CR0402-FX-1002GLF,Bourns,0402,Adom stock,,,VOUT = 0.596 x (1 + 73.6/10) = 4.98 V +R4,1M,EN UVLO top,CR0402-FX-1004GLF,Bourns,0402,Adom stock,,,start 8.58 V / stop 6.87 V +R5,150k,EN UVLO bottom,CR0402-FX-1503GLF,Bourns,0402,Adom stock,,, +R6,2.2k,LED resistor,CR0402-FX-2201GLF,Bourns,0402,Adom stock,,,1.4 mA +R7,10k,VMON divider top (VOUT to VMON),CR0402-FX-1002GLF,Bourns,0402,Adom stock,,,VMON = VOUT/2 = 2.5 V for a 3.3 V ADC +R8,10k,VMON divider bottom (VMON to GND),CR0402-FX-1002GLF,Bourns,0402,Adom stock,,,VMON source impedance 5 k +D1,green LED,5 V power-good indicator,IN-S63BTG,Inolux,0603,Adom stock,,, +J1,MachineContactMedium,molecule contact (VIN),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board +J2,MachineContactMedium,molecule contact (GND),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board +J3,MachineContactMedium,molecule contact (EN),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board +J4,MachineContactMedium,molecule contact (VOUT),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board +J5,MachineContactMedium,molecule contact (GND),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board +J6,MachineContactMedium,molecule contact (VMON),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board +J7,MachineContactMedium,molecule contact (GND: the probing workcell's ground pin),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board; added 2026-10-07 so the probe's ground pin seats clear of the wired contacts +MP1,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin +MP2,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin +MP3,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin +MP4,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin +TP1,SW,test pad (SW),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP2,FB,test pad (FB),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP3,VOUT,test pad (VOUT),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP4,GND,test pad (GND),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP6,VIN,test pad (VIN),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP7,VIN,test pad (VIN),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP8,VOUT,test pad (VOUT),no part,,1.0 mm round copper pad,no part,,,"bare copper probe pad, not placed" +TP5,EN,"test pad (EN), added by the test plan",no part,,0.5 mm round copper pad (adom/testpoint-pad-0-5mm),no part,,,"bare copper probe pad, not placed" +TP9,VMON,"test pad (VMON), added by the test plan",no part,,0.5 mm round copper pad (adom/testpoint-pad-0-5mm),no part,,,"bare copper probe pad, not placed"
design/calcs.jsonadded+74@@ -0,0 +1,74 @@+{+ "feedback": {+ "Rtop_parts_ohm": [+ 5600.0,+ 68000.0+ ],+ "Rbot_parts_ohm": [+ 10000.0+ ],+ "Rtop": 73600.0,+ "Rbot": 10000.0,+ "vout_nominal": 4.9826,+ "error_pct": -0.35,+ "vout_range_vref_tol": [+ 4.857,+ 5.108+ ]+ },+ "inductor": {+ "Lmin_uH": 22.92,+ "L_uH": 15,+ "ripple_A_at_12V": 0.389,+ "ripple_A_at_16V": 0.458,+ "Ipeak_A_at_16V": 1.229,+ "Irms_A": 1.009,+ "Isat_required_A": 2.5,+ "note": "Isat 3.7 A / Irms 3.5 A (AMPLH5030S-150M datasheet p2) >= the 2.5 A HS current-limit minimum, DCR 98 typ / 118 max mOhm. 15 uH chosen over Lmin 22.9 uH (KIND 0.3 at 16 V): it is the 5 V value in TI Table 7-2, which the internal slope compensation is tuned for; ripple 0.39 A (39 pct) at 12 V and 0.46 A (46 pct) at 16 V, peak 1.23 A, within 20-50 pct for low-ESR ceramic outputs"+ },+ "cout": {+ "C_step_min_uF": 26.7,+ "C_ripple_min_uF": 11.5,+ "chosen": "3 x 22 uF 0805 X5R 10 V (Adom stock)",+ "effective_uF": 36.3,+ "fo_kHz_eq14": 21.8,+ "fo_limit_kHz": 40,+ "ripple_mV_at_16V": 3.16,+ "Icout_rms_each_mA": 44.1+ },+ "cff": {+ "calc_pF": 99.4,+ "chosen_pF": 68,+ "note": "C0G 0402 stock; verified by the loop-gain sim"+ },+ "cin": {+ "Irms_A": 0.493,+ "chosen": "2 x 10 uF 1206 X7R 25 V (Mouser) + 100 nF 0603 X7R 50 V (Adom stock) at the VIN pin",+ "effective_uF": 12.0,+ "vin_ripple_mV": 40.5,+ "bulk": "47 uF 35 V aluminium electrolytic: damps the supply cable inductance against the low-ESR ceramics (hot-plug ringing), datasheet 7.3"+ },+ "uvlo": {+ "R_top": 1000000.0,+ "R_bot": 150000.0,+ "start_V": 8.58,+ "stop_V": 6.87,+ "hysteresis_V": 1.7,+ "EN_at_16V": 2.09,+ "EN_abs_max": 5.5,+ "EN_at_28V": 3.65+ },+ "thermal": {+ "P_ic_W": 0.253,+ "P_inductor_W": 0.12,+ "efficiency_est": 0.931,+ "Tj_rise_C_RthJA_118.6": 30.0,+ "Tj_rise_C_RthJA_EVM_57.2": 14.5,+ "note": "I^2R at hot Rds(on) over the duty + switching estimate; SOT-23 has no pad, heat leaves through the pins: GND/VIN copper is the heatsink"+ },+ "led": {+ "R_ohm": 2200.0,+ "I_mA": 1.36,+ "note": "power-good indicator on VOUT; 0603 green (Adom stock)"+ }+}
design/calcs.pyadded+112@@ -0,0 +1,112 @@+#!/usr/bin/env python3+"""TPS54202 12 V -> 5 V / 1 A buck: every value from the datasheet equations (SLVSD26C).++Run: python3 calcs.py -> prints the design table and writes calcs.json.+"""+import itertools, json, math++# ---- brief --------------------------------------------------------------+VIN_NOM, VIN_MAX, VIN_MIN = 12.0, 16.0, 9.0 # 12 V bench/control-panel rail; design margin to 16 V+VOUT, IOUT = 5.0, 1.0+FSW = 500e3 # fixed, datasheet 5.5 (390..630 kHz)+VREF = 0.596 # datasheet 5.5, 0.581..0.611+RHS, RLS = 0.148, 0.078 # FET on-resistance, 25 C+ILIM_HS_MIN = 2.5++out = {}++# ---- feedback divider from Adom-stocked 0402 values (E24 subset, 41 values) ----+STOCK = [1, 1.5, 2.2, 3.3, 4.7, 6.8, 10, 15, 22, 33, 47, 68, 100, 120, 150, 220, 330, 470, 680,+ 1e3, 1.5e3, 2e3, 2.2e3, 3.3e3, 4.7e3, 5.6e3, 6.8e3, 10e3, 15e3, 22e3, 33e3, 47e3, 68e3,+ 100e3, 150e3, 220e3, 330e3, 470e3, 680e3, 1e6]+cands = []+single = [r for r in STOCK if 5e3 <= r <= 1e6]+pairs = [(a, b) for a, b in itertools.combinations_with_replacement(single, 2)]+for rtop_parts in [(r,) for r in single] + pairs:+ rtop = sum(rtop_parts)+ for rbot_parts in [(r,) for r in single] + pairs:+ rbot = sum(rbot_parts)+ if not (5e3 <= rbot <= 30e3) or not (50e3 <= rtop <= 250e3):+ continue # keep divider current 20..100 uA, Rtop in the Cff range+ v = VREF * (1 + rtop / rbot)+ n = len(rtop_parts) + len(rbot_parts)+ cands.append((abs(v - VOUT), n, rtop_parts, rbot_parts, v))+cands.sort(key=lambda c: (c[1] > 3, round(c[0], 3), c[1]))+err, n, rt, rb, v = cands[0]+out["feedback"] = {"Rtop_parts_ohm": rt, "Rbot_parts_ohm": rb, "Rtop": sum(rt), "Rbot": sum(rb),+ "vout_nominal": round(v, 4), "error_pct": round(100 * (v - VOUT) / VOUT, 2),+ "vout_range_vref_tol": [round(0.581 * (1 + sum(rt) / sum(rb)), 3),+ round(0.611 * (1 + sum(rt) / sum(rb)), 3)]}++# ---- inductor (eq 8/9/10) ----------------------------------------------+KIND = 0.3+LMIN = VOUT * (VIN_MAX - VOUT) / (VIN_MAX * KIND * IOUT * FSW)+L = 15e-6+ripple = lambda vin: VOUT * (vin - VOUT) / (vin * L * FSW)+out["inductor"] = {"Lmin_uH": round(LMIN * 1e6, 2), "L_uH": 15,+ "ripple_A_at_12V": round(ripple(VIN_NOM), 3), "ripple_A_at_16V": round(ripple(VIN_MAX), 3),+ "Ipeak_A_at_16V": round(IOUT + ripple(VIN_MAX) / 2, 3),+ "Irms_A": round(math.sqrt(IOUT**2 + ripple(VIN_MAX)**2 / 12), 3),+ "Isat_required_A": ILIM_HS_MIN,+ "note": ("Isat 3.7 A / Irms 3.5 A (AMPLH5030S-150M datasheet p2) >= the 2.5 A HS current-limit minimum, DCR 98 typ / 118 max mOhm. "+ "15 uH chosen over Lmin 22.9 uH (KIND 0.3 at 16 V): it is the 5 V value in TI Table 7-2, which the internal slope compensation is tuned for; "+ "ripple 0.39 A (39 pct) at 12 V and 0.46 A (46 pct) at 16 V, peak 1.23 A, within 20-50 pct for low-ESR ceramic outputs")}++# ---- output capacitance (eq 11/12/13/14) -------------------------------+dI_step, dV_allow = 1.0, 0.15 # 0 -> 1 A step, 3 % droop budget+CO_step = 2 * dI_step / (FSW * dV_allow)+CO_ripple = 1 / (8 * FSW * (0.010 / ripple(VIN_MAX))) # 10 mV ripple target+N_COUT, C_EACH, DERATE = 3, 22e-6, 0.55 # CL21A226MPQNNNE 0805 X5R 10 V; ~45 % loss at 5 V DC bias+CO_eff = N_COUT * C_EACH * DERATE+fo = 3.95e3 / (VOUT * CO_eff * 1e6) * 1e3 # eq 14, fo in Hz (Cout in uF, result kHz)+out["cout"] = {"C_step_min_uF": round(CO_step * 1e6, 1), "C_ripple_min_uF": round(CO_ripple * 1e6, 1),+ "chosen": f"{N_COUT} x 22 uF 0805 X5R 10 V (Adom stock)", "effective_uF": round(CO_eff * 1e6, 1),+ "fo_kHz_eq14": round(fo / 1e3, 1), "fo_limit_kHz": 40,+ "ripple_mV_at_16V": round(ripple(VIN_MAX) / (8 * FSW * CO_eff) * 1e3, 2),+ "Icout_rms_each_mA": round(ripple(VIN_MAX) / math.sqrt(12) / N_COUT * 1e3, 1)}++# ---- feed-forward capacitor (eq 16) ------------------------------------+CFF = 1 / (2 * math.pi * fo * out["feedback"]["Rtop"])+out["cff"] = {"calc_pF": round(CFF * 1e12, 1), "chosen_pF": 68,+ "note": "C0G 0402 stock; verified by the loop-gain sim"}++# ---- input capacitance --------------------------------------------------+D = VOUT / VIN_NOM+ICIN_RMS = IOUT * math.sqrt(D * (1 - D))+CIN_eff = 2 * 10e-6 * 0.6+dVin = IOUT * D * (1 - D) / (CIN_eff * FSW)+out["cin"] = {"Irms_A": round(ICIN_RMS, 3), "chosen": "2 x 10 uF 1206 X7R 25 V (Mouser) + 100 nF 0603 X7R 50 V (Adom stock) at the VIN pin",+ "effective_uF": CIN_eff * 1e6, "vin_ripple_mV": round(dVin * 1e3, 1),+ "bulk": "47 uF 35 V aluminium electrolytic: damps the supply cable inductance against the low-ESR ceramics (hot-plug ringing), datasheet 7.3"}++# ---- EN UVLO divider (stocked values) ----------------------------------+IP, IH, VEN_R, VEN_F = 0.7e-6, 1.55e-6, 1.21, 1.19+R_EN_TOP, R_EN_BOT = 1e6, 150e3+vstart = R_EN_TOP * (VEN_R / R_EN_BOT - IP) + VEN_R+vstop = R_EN_TOP * (VEN_F / R_EN_BOT - IP - IH) + VEN_F+ven_max = VIN_MAX * R_EN_BOT / (R_EN_TOP + R_EN_BOT)+out["uvlo"] = {"R_top": R_EN_TOP, "R_bot": R_EN_BOT, "start_V": round(vstart, 2), "stop_V": round(vstop, 2),+ "hysteresis_V": round(vstart - vstop, 2), "EN_at_16V": round(ven_max, 2), "EN_abs_max": 5.5,+ "EN_at_28V": round(28 * R_EN_BOT / (R_EN_TOP + R_EN_BOT), 2)}++# ---- losses + thermal ---------------------------------------------------+DCR = 0.118 # Abracon AMPLH5030S-150MT (Mouser 815-AMPLH5030S-150T)+Irms = out["inductor"]["Irms_A"]+p_cond = Irms**2 * (D * RHS * 1.4 + (1 - D) * RLS * 1.4) # hot Rds(on) x1.4+p_sw = 0.5 * VIN_NOM * IOUT * (15e-9 + 15e-9) * FSW # ~15 ns edges, estimate+p_gate = 0.01+p_ic = p_cond + p_sw + p_gate+p_l = Irms**2 * DCR+eff = VOUT * IOUT / (VOUT * IOUT + p_ic + p_l)+out["thermal"] = {"P_ic_W": round(p_ic, 3), "P_inductor_W": round(p_l, 3), "efficiency_est": round(eff, 3),+ "Tj_rise_C_RthJA_118.6": round(p_ic * 118.6, 1), "Tj_rise_C_RthJA_EVM_57.2": round(p_ic * 57.2, 1),+ "note": "I^2R at hot Rds(on) over the duty + switching estimate; SOT-23 has no pad, heat leaves through the pins: GND/VIN copper is the heatsink"}++# ---- LED ----------------------------------------------------------------+out["led"] = {"R_ohm": 2.2e3, "I_mA": round((VOUT - 2.0) / 2.2e3 * 1e3, 2), "note": "power-good indicator on VOUT; 0603 green (Adom stock)"}++json.dump(out, open("calcs.json", "w"), indent=1)+for k, v in out.items():+ print(f"== {k}")+ for kk, vv in v.items():+ print(f" {kk}: {vv}")
design/netlist.jsonadded+584@@ -0,0 +1,584 @@+{+ "components": [+ {+ "block": "core",+ "fp": "Package_TO_SOT_SMD:TSOT-23-6",+ "mfr": "Texas Instruments",+ "mpn": "TPS54202DDCR",+ "ref": "U1",+ "src": "Mouser 595-TPS54202DDCR",+ "sym": "Regulator_Switching:TPS54202DDC",+ "value": "TPS54202DDCR"+ },+ {+ "block": "output",+ "fp": "buck12v5v:L_Abracon_AMPLH5030S",+ "mfr": "Abracon",+ "mpn": "AMPLH5030S-150MT",+ "ref": "L1",+ "src": "Mouser 815-AMPLH5030S-150T",+ "sym": "Device:L",+ "value": "15uH"+ },+ {+ "block": "input",+ "fp": "Capacitor_SMD:CP_Elec_6.3x5.8",+ "mfr": "Panasonic",+ "mpn": "EEE-FK1V470P",+ "ref": "C1",+ "src": "Mouser 667-EEE-FK1V470P",+ "sym": "Device:C_Polarized",+ "value": "47uF 35V"+ },+ {+ "block": "input",+ "fp": "Capacitor_SMD:C_1206_3216Metric",+ "mfr": "Yageo",+ "mpn": "CC1206KKX7R8BB106",+ "ref": "C2",+ "src": "Mouser 603-CC126KKX7R8BB106",+ "sym": "Device:C",+ "value": "10uF 25V"+ },+ {+ "block": "input",+ "fp": "Capacitor_SMD:C_1206_3216Metric",+ "mfr": "Yageo",+ "mpn": "CC1206KKX7R8BB106",+ "ref": "C3",+ "src": "Mouser 603-CC126KKX7R8BB106",+ "sym": "Device:C",+ "value": "10uF 25V"+ },+ {+ "block": "input",+ "fp": "Capacitor_SMD:C_0603_1608Metric",+ "mfr": "Walsin",+ "mpn": "0603B104J500CT",+ "ref": "C4",+ "src": "Adom stock",+ "sym": "Device:C",+ "value": "100nF 50V"+ },+ {+ "block": "core",+ "fp": "Capacitor_SMD:C_0603_1608Metric",+ "mfr": "Walsin",+ "mpn": "0603B104J500CT",+ "ref": "C5",+ "src": "Adom stock",+ "sym": "Device:C",+ "value": "100nF 50V"+ },+ {+ "block": "output",+ "fp": "Capacitor_SMD:C_0805_2012Metric",+ "mfr": "Samsung",+ "mpn": "CL21A226MPQNNNE",+ "ref": "C6",+ "src": "Adom stock",+ "sym": "Device:C",+ "value": "22uF 10V"+ },+ {+ "block": "output",+ "fp": "Capacitor_SMD:C_0805_2012Metric",+ "mfr": "Samsung",+ "mpn": "CL21A226MPQNNNE",+ "ref": "C7",+ "src": "Adom stock",+ "sym": "Device:C",+ "value": "22uF 10V"+ },+ {+ "block": "output",+ "fp": "Capacitor_SMD:C_0805_2012Metric",+ "mfr": "Samsung",+ "mpn": "CL21A226MPQNNNE",+ "ref": "C8",+ "src": "Adom stock",+ "sym": "Device:C",+ "value": "22uF 10V"+ },+ {+ "block": "feedback",+ "fp": "Capacitor_SMD:C_0402_1005Metric",+ "mfr": "Walsin",+ "mpn": "0402N680J500CT",+ "ref": "C9",+ "src": "Adom stock",+ "sym": "Device:C",+ "value": "68pF C0G"+ },+ {+ "block": "feedback",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-6802GLF",+ "ref": "R1",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "68k"+ },+ {+ "block": "feedback",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-5601GLF",+ "ref": "R2",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "5.6k"+ },+ {+ "block": "feedback",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-1002GLF",+ "ref": "R3",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "10k"+ },+ {+ "block": "enable",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-1004GLF",+ "ref": "R4",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "1M"+ },+ {+ "block": "enable",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-1503GLF",+ "ref": "R5",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "150k"+ },+ {+ "block": "indicator",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-2201GLF",+ "ref": "R6",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "2.2k"+ },+ {+ "block": "indicator",+ "fp": "LED_SMD:LED_0603_1608Metric",+ "mfr": "Inolux",+ "mpn": "IN-S63BTG",+ "ref": "D1",+ "src": "Adom stock",+ "sym": "Device:LED",+ "value": "green"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 0,+ "y": 0+ },+ "fp": "Molecule:MachinePinMediumShort",+ "mfr": "Adom",+ "mpn": "MachinePinMediumShort",+ "ref": "MP1",+ "src": "Adom stock",+ "sym": "Molecule:MachinePin",+ "value": "MachinePinMediumShort"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 24,+ "y": 0+ },+ "fp": "Molecule:MachinePinMediumShort",+ "mfr": "Adom",+ "mpn": "MachinePinMediumShort",+ "ref": "MP2",+ "src": "Adom stock",+ "sym": "Molecule:MachinePin",+ "value": "MachinePinMediumShort"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 0,+ "y": 16+ },+ "fp": "Molecule:MachinePinMediumShort",+ "mfr": "Adom",+ "mpn": "MachinePinMediumShort",+ "ref": "MP3",+ "src": "Adom stock",+ "sym": "Molecule:MachinePin",+ "value": "MachinePinMediumShort"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 24,+ "y": 16+ },+ "fp": "Molecule:MachinePinMediumShort",+ "mfr": "Adom",+ "mpn": "MachinePinMediumShort",+ "ref": "MP4",+ "src": "Adom stock",+ "sym": "Molecule:MachinePin",+ "value": "MachinePinMediumShort"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 0,+ "y": 12+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "VIN",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J1",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 0,+ "y": 8+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "GND",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J2",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 0,+ "y": 4+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "EN",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J3",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 24,+ "y": 12+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "VOUT",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J4",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 24,+ "y": 8+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "GND",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J5",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 24,+ "y": 4+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "VMON",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J6",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "SW",+ "mfr": "",+ "mpn": "",+ "ref": "TP1",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "SW"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "FB",+ "mfr": "",+ "mpn": "",+ "ref": "TP2",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "FB"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "VOUT",+ "mfr": "",+ "mpn": "",+ "ref": "TP3",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "VOUT"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "GND",+ "mfr": "",+ "mpn": "",+ "ref": "TP4",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "GND"+ },+ {+ "block": "monitor",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-1002GLF",+ "ref": "R7",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "10k"+ },+ {+ "block": "monitor",+ "fp": "Resistor_SMD:R_0402_1005Metric",+ "mfr": "Bourns",+ "mpn": "CR0402-FX-1002GLF",+ "ref": "R8",+ "src": "Adom stock",+ "sym": "Device:R",+ "value": "10k"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "VIN on the board (added for probing coverage, 2026-10-06)",+ "mfr": "",+ "mpn": "",+ "ref": "TP6",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "VIN"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "VIN beside C2, the regulator input cap (probing redesign, 2026-10-07)",+ "mfr": "",+ "mpn": "",+ "ref": "TP7",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "VIN"+ },+ {+ "block": "probe",+ "fp": "TestPoint:TestPoint_Pad_D1.0mm",+ "label": "VOUT beside L1 output, before the output caps (probing redesign, 2026-10-07)",+ "mfr": "",+ "mpn": "",+ "ref": "TP8",+ "src": "bare copper pad",+ "sym": "Connector:TestPoint",+ "value": "VOUT"+ },+ {+ "block": "molecule",+ "fixed": {+ "x": 12,+ "y": 0+ },+ "fp": "Molecule:MachineContactMedium",+ "label": "GND (probe ground pin: the pincer keep-out is clear here)",+ "mfr": "Adom",+ "mpn": "MachineContactMedium",+ "ref": "J7",+ "src": "Adom stock",+ "sym": "Molecule:Contact",+ "value": "MachineContactMedium"+ },+ {+ "block": "test",+ "fp": "adom:Adom_TestPoint_D0.5mm",+ "mpn": "Adom_TestPoint_D0.5mm",+ "page": "adom/testpoint-pad-0-5mm",+ "ref": "TP5",+ "value": "TP_0.5mm",+ "why": "probe spot for EN (test plan)"+ },+ {+ "block": "test",+ "fp": "adom:Adom_TestPoint_D0.5mm",+ "mpn": "Adom_TestPoint_D0.5mm",+ "page": "adom/testpoint-pad-0-5mm",+ "ref": "TP9",+ "value": "TP_0.5mm",+ "why": "probe spot for VMON (test plan)"+ }+ ],+ "design": "buck-12v5v-molecule",+ "molecule": {+ "board_mm": [+ 28,+ 20+ ],+ "corner_pins_net": "GND",+ "edge_margin_mm": 2,+ "fab": "3rd party fab, 2-layer, 1.6 mm, design current for 0.5 oz copper",+ "grid_mm": 2,+ "origin": "centre of MP1 (lower-left / FL) pin",+ "pin": "MachinePinMediumShort",+ "pin_span_mm": [+ 24,+ 16+ ]+ },+ "molecule_io": {+ "control": [+ "EN (J3): open-drain low disables"+ ],+ "monitor": [+ "VMON (J6) = VOUT/2 for a 3.3 V ADC"+ ],+ "power": [+ "VIN (J1)",+ "GND (J2, J5, MP1-4)",+ "VOUT (J4)"+ ],+ "probe": [+ "TP1 SW",+ "TP2 FB",+ "TP3 VOUT",+ "TP4 GND",+ "TP5 GND"+ ]+ },+ "nets": {+ "BOOT": [+ "U1.6",+ "C5.1"+ ],+ "EN": [+ "U1.5",+ "R4.2",+ "R5.1",+ "J3.1",+ "TP5.1"+ ],+ "FB": [+ "U1.4",+ "R2.2",+ "R3.1",+ "C9.2",+ "TP2.1"+ ],+ "FBM": [+ "R1.2",+ "R2.1"+ ],+ "GND": [+ "U1.1",+ "C1.2",+ "C2.2",+ "C3.2",+ "C4.2",+ "C6.2",+ "C7.2",+ "C8.2",+ "R3.2",+ "R5.2",+ "D1.1",+ "MP1.1",+ "MP2.1",+ "MP3.1",+ "MP4.1",+ "J2.1",+ "J5.1",+ "TP4.1",+ "R8.2",+ "J7.1"+ ],+ "LED": [+ "R6.2",+ "D1.2"+ ],+ "SW": [+ "U1.2",+ "C5.2",+ "L1.1",+ "TP1.1"+ ],+ "VIN": [+ "U1.3",+ "C1.1",+ "C2.1",+ "C3.1",+ "C4.1",+ "R4.1",+ "J1.1",+ "TP6.1",+ "TP7.1"+ ],+ "VMON": [+ "R7.2",+ "R8.1",+ "J6.1",+ "TP9.1"+ ],+ "VOUT": [+ "L1.2",+ "C6.1",+ "C7.1",+ "C8.1",+ "R1.1",+ "C9.1",+ "R6.1",+ "J4.1",+ "TP3.1",+ "R7.1",+ "TP8.1"+ ]+ },+ "title": "12 V to 5 V / 1 A buck molecule (TPS54202)"+}
design/tests.jsonadded+10@@ -0,0 +1,10 @@+[+ {"id":"vin","what":"12 V arriving on the board, at the input caps","net":"VIN","why":"input path, ripple on C2/C3 (40 mV calc)","kind":"ripple","expect":"11.4 to 12.6 V DC, under 60 mV p-p at 1 A"},+ {"id":"sw","what":"switch node: frequency, edges, ringing","net":"SW","why":"500 kHz fixed, 390-630 kHz range","kind":"waveform","expect":"0 to 12 V square, 500 kHz, duty about 42 pct"},+ {"id":"vout","what":"5 V out and its ripple at 1 A","net":"VOUT","why":"regulation 4.86-5.11 V over Vref tolerance; 3.2 mV calc ripple","kind":"ripple","expect":"4.86 to 5.11 V, under 20 mV p-p"},+ {"id":"fb","what":"feedback node","net":"FB","why":"loop regulates FB to 0.596 V","kind":"dc","expect":"0.581 to 0.611 V"},+ {"id":"en","what":"enable / UVLO divider","net":"EN","why":"start 8.58 V, stop 6.87 V; 1.69 V at 12 V in","kind":"dc","expect":"1.6 to 1.8 V at 12 V in"},+ {"id":"vmon","what":"VOUT/2 monitor","net":"VMON","why":"ADC monitor divider R7/R8","kind":"dc","expect":"2.43 to 2.56 V"},+ {"id":"led","what":"power LED lit","net":"LED","why":"camera check of VOUT present","kind":"camera","expect":"on"},+ {"id":"gnd","what":"ground tether","net":"GND","why":"probe reference","kind":"ground","expect":"J2 / J5 machine contact"}+]
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manufacturing/Bill of Materials-Buck12V5V.csv added+17@@ -0,0 +1,17 @@+Name,Description,Designator,Footprint,Quantity,MPN,Manufacturer,Mouser Part #,DigiKey Part #,LCSC Part #,DNP +47uF 35V,"SMD aluminium electrolytic, case D (6.3 x 5.8 mm)",C1,EEE-FK1V470P,1,EEE-FK1V470P,Panasonic,667-EEE-FK1V470P,PCE3842TR-ND,, +10uF 25V,1206 (3216 metric),"C2, C3",CC1206KKX7R8BB106,2,CC1206KKX7R8BB106,Yageo,603-CC126KKX7R8BB106,311-1959-2-ND,C70462, +100nF 50V,0603 MLCC · 100 nF ±5% X7R · 50 V,"C4, C5",0603B104J500CT,2,0603B104J500CT,Walsin Technology Corporation,791-0603B104J500CT,1292-1391-2-ND,C119027, +22uF 10V,0805 MLCC · 22 µF ±20% X5R · 10 V,"C6, C7, C8",CL21A226MPQNNNE,3,CL21A226MPQNNNE,Samsung Electro-Mechanics,187-CL21A226MPQNNNE,1276-2910-2-ND,C29277, +68pF C0G,0402 MLCC · 68 pF ±5% NP0 · 50 V,C9,0402N680J500CT,1,0402N680J500CT,Walsin Technology Corporation,791-0402N680J500CT,1292-1344-2-ND,C301990, +green,0603 SMD Green LED · 3.2 V drop · 25 mA max,D1,IN-S63BTG,1,IN-S63BTG,Inolux Corporation,743-IN-S63BTG,1830-1069-2-ND,C5740463, +MachineContactMedium,"Adom Medium press-fit machine pin contact (Ø0.78 hole / Ø1.30 ring, ~6.4 A)","J1, J2, J3, J4, J5, J6, J7",MACHINECONTACTMEDIUM,7,MachineContactMedium,Adom,,,,DNP +15uH,SMD molded 5.7 x 5.3 x 2.8 mm (AMPLH5030S),L1,AMPLH5030S-150MT,1,AMPLH5030S-150MT,Abracon,815-AMPLH5030S-150T,535-AMPLH5030S-150MTTR-ND,, +MachinePinMediumShort,Adom Medium Short machine pin (Ø1.2 body / Ø1.2 hole),"MP1, MP2, MP3, MP4",MACHINEPINMEDIUMSHORT,4,MachinePinMediumShort,Adom,,,,DNP +68k,0402 Thick Film Resistor · 68 kΩ ±1% · 1/16 W,R1,CR0402-FX-6802GLF,1,CR0402-FX-6802GLF,Bourns,652-CR0402FX-6802GLF,CR0402-FX-6802GLFTR-ND,C2085395, +5.6k,0402 Thick Film Resistor · 5.6 kΩ ±1% · 1/16 W,R2,CR0402-FX-5601GLF,1,CR0402-FX-5601GLF,Bourns,652-CR0402FX-5601GLF,CR0402-FX-5601GLFTR-ND,C2077074, +10k,0402 Thick Film Resistor · 10 kΩ ±1% · 1/16 W,"R3, R7, R8",CR0402-FX-1002GLF,3,CR0402-FX-1002GLF,Bourns,652-CR0402FX-1002GLF,CR0402-FX-1002GLFTR-ND,C202396, +1M,0402 Thick Film Resistor · 1 MΩ ±1% · 1/16 W,R4,CR0402-FX-1004GLF,1,CR0402-FX-1004GLF,Bourns,652-CR0402FX-1004GLF,CR0402-FX-1004GLFTR-ND,C202398, +150k,0402 Thick Film Resistor · 150 kΩ ±1% · 1/16 W,R5,CR0402-FX-1503GLF,1,CR0402-FX-1503GLF,Bourns,652-CR0402FX-1503GLF,CR0402-FX-1503GLFTR-ND,C21547414, +2.2k,0402 Thick Film Resistor · 2.2 kΩ ±1% · 1/16 W,R6,CR0402-FX-2201GLF,1,CR0402-FX-2201GLF,Bourns,652-CR0402FX-2201GLF,CR0402-FX-2201GLFTR-ND,C2076845, +TPS54202DDCR,"EMI-friendly 4.5 V to 28 V input, 2 A synchronous step-down converter with two integrated switching FETs, internal loop",U1,TPS54202DDCR,1,TPS54202DDCR,Texas Instruments,595-TPS54202DDCR,296-TPS54202DDCRTR-ND,C191884,
manufacturing/Buck12V5V-gerbers.zipadded⋯ 1 unchanged line ⋯
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manufacturing/Buck12V5V.GBOadded+319@@ -0,0 +1,319 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=32896* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD11C,0.00394*% +D11* +X83458Y6266D02* +X82540D01* +X82081Y5807D01* +Y4429D01* +X83458D01* +X83917Y4888D01* +X83458Y5347D01* +X82081D01* +X79326Y7184D02* +Y4429D01* +X80703D01* +X81162Y4888D01* +Y5807D01* +X80703Y6266D01* +X79326D01* +X77948Y4429D02* +X77030D01* +X76571Y4888D01* +Y5807D01* +X77030Y6266D01* +X77948D01* +X78407Y5807D01* +Y4888D01* +X77948Y4429D01* +X75652D02* +Y6266D01* +X75193D01* +X74734Y5807D01* +Y4429D01* +Y5807D01* +X74275Y6266D01* +X73816Y5807D01* +Y4429D01* +X72897Y5807D02* +X71061D01* +X69683Y6266D02* +X68765D01* +X68305Y5807D01* +Y4429D01* +X69683D01* +X70142Y4888D01* +X69683Y5347D01* +X68305D01* +X67387Y4429D02* +X66469D01* +X66928D01* +Y6266D01* +X67387D01* +X64632Y4429D02* +Y6725D01* +Y5807D01* +X65091D01* +X64173D01* +X64632D01* +Y6725D01* +X64173Y7184D01* +X62796Y4429D02* +X61877D01* +X62336D01* +Y7184D01* +X62796D01* +X60040Y4429D02* +X59122D01* +X58663Y4888D01* +Y5807D01* +X59122Y6266D01* +X60040D01* +X60500Y5807D01* +Y4888D01* +X60040Y4429D01* +X57745Y6266D02* +Y4888D01* +X57285Y4429D01* +X56826Y4888D01* +X56367Y4429D01* +X55908Y4888D01* +Y6266D01* +X50398Y4429D02* +X52235D01* +X50398Y6266D01* +Y6725D01* +X50857Y7184D01* +X51775D01* +X52235Y6725D01* +X49480D02* +X49020Y7184D01* +X48102D01* +X47643Y6725D01* +Y4888D01* +X48102Y4429D01* +X49020D01* +X49480Y4888D01* +Y6725D01* +X44888Y4429D02* +X46725D01* +X44888Y6266D01* +Y6725D01* +X45347Y7184D01* +X46265D01* +X46725Y6725D01* +X42133Y7184D02* +X43051Y6725D01* +X43970Y5807D01* +Y4888D01* +X43510Y4429D01* +X42592D01* +X42133Y4888D01* +Y5347D01* +X42592Y5807D01* +X43970D01* +X41214D02* +X39378D01* +X38460Y4429D02* +X37541D01* +X38000D01* +Y7184D01* +X38460Y6725D01* +X36164D02* +X35704Y7184D01* +X34786D01* +X34327Y6725D01* +Y4888D01* +X34786Y4429D01* +X35704D01* +X36164Y4888D01* +Y6725D01* +X33409Y5807D02* +X31572D01* +X30654Y4429D02* +X29735D01* +X30194D01* +Y7184D01* +X30654Y6725D01* +X26521Y7184D02* +X27439Y6725D01* +X28358Y5807D01* +Y4888D01* +X27899Y4429D01* +X26980D01* +X26521Y4888D01* +Y5347D01* +X26980Y5807D01* +X28358D01* +X95699Y8563D02* +X94780D01* +X95240D01* +Y11318D01* +X95699Y10859D01* +X91566Y8563D02* +X93403D01* +X91566Y10400D01* +Y10859D01* +X92026Y11318D01* +X92944D01* +X93403Y10859D01* +X87893Y11318D02* +Y9481D01* +X86975Y8563D01* +X86056Y9481D01* +Y11318D01* +X81924Y10859D02* +Y10400D01* +X82383D01* +X81464D01* +X81924D01* +Y9022D01* +X81464Y8563D01* +X79628D02* +X78710D01* +X78250Y9022D01* +Y9940D01* +X78710Y10400D01* +X79628D01* +X80087Y9940D01* +Y9022D01* +X79628Y8563D01* +X72740Y11318D02* +X74577D01* +Y9940D01* +X73659Y10400D01* +X73199D01* +X72740Y9940D01* +Y9022D01* +X73199Y8563D01* +X74118D01* +X74577Y9022D01* +X69067Y11318D02* +Y9481D01* +X68149Y8563D01* +X67230Y9481D01* +Y11318D01* +X63557Y8563D02* +X62639D01* +X63098D01* +Y11318D01* +X63557Y10859D01* +X58506Y8563D02* +Y10400D01* +X57588Y11318D01* +X56669Y10400D01* +Y8563D01* +Y9940D01* +X58506D01* +X52996Y11318D02* +Y8563D01* +X51618D01* +X51159Y9022D01* +Y9481D01* +X51618Y9940D01* +X52996D01* +X51618D01* +X51159Y10400D01* +Y10859D01* +X51618Y11318D01* +X52996D01* +X50241Y10400D02* +Y9022D01* +X49782Y8563D01* +X48404D01* +Y10400D01* +X45649D02* +X47027D01* +X47486Y9940D01* +Y9022D01* +X47027Y8563D01* +X45649D01* +X44731D02* +Y11318D01* +Y9481D02* +X43353Y10400D01* +X44731Y9481D02* +X43353Y8563D01* +X38303D02* +X39221Y9481D01* +Y10400D01* +X38303Y11318D01* +X36925D02* +X35088D01* +X36007D01* +Y8563D01* +X34170D02* +Y11318D01* +X32792D01* +X32333Y10859D01* +Y9940D01* +X32792Y9481D01* +X34170D01* +X29578Y10859D02* +X30038Y11318D01* +X30956D01* +X31415Y10859D01* +Y10400D01* +X30956Y9940D01* +X30038D01* +X29578Y9481D01* +Y9022D01* +X30038Y8563D01* +X30956D01* +X31415Y9022D01* +X26823Y11318D02* +X28660D01* +Y9940D01* +X27742Y10400D01* +X27283D01* +X26823Y9940D01* +Y9022D01* +X27283Y8563D01* +X28201D01* +X28660Y9022D01* +X24528Y8563D02* +Y11318D01* +X25905Y9940D01* +X24068D01* +X21313Y8563D02* +X23150D01* +X21313Y10400D01* +Y10859D01* +X21772Y11318D01* +X22691D01* +X23150Y10859D01* +X20395D02* +X19936Y11318D01* +X19017D01* +X18558Y10859D01* +Y9022D01* +X19017Y8563D01* +X19936D01* +X20395Y9022D01* +Y10859D01* +X15803Y8563D02* +X17640D01* +X15803Y10400D01* +Y10859D01* +X16262Y11318D01* +X17181D01* +X17640Y10859D01* +X14885Y8563D02* +X13967Y9481D01* +Y10400D01* +X14885Y11318D01* +M02*
manufacturing/Buck12V5V.GBPadded+17@@ -0,0 +1,17 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=128* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +M02*
manufacturing/Buck12V5V.GBSadded+87@@ -0,0 +1,87 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=16711935* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Negative* +G04* +G01* +G75* +%ADD30C,0.06299*% +%ADD31C,0.05118*% +%ADD32C,0.02362*% +%ADD33C,0.03150*% +D30* +X7874Y7874D02* +D03* +Y70866D02* +D03* +X102362D02* +D03* +Y7874D02* +D03* +D31* +X7874Y39370D02* +D03* +Y55118D02* +D03* +Y23622D02* +D03* +X102362Y55118D02* +D03* +Y39370D02* +D03* +Y23622D02* +D03* +X31496Y15748D02* +D03* +D32* +X69095Y53347D02* +D03* +X61811Y36417D02* +D03* +X23228Y29921D02* +D03* +X50787Y43307D02* +D03* +X55118Y37008D02* +D03* +X45276Y45276D02* +D03* +D33* +X32283Y57087D02* +D03* +X89370Y19291D02* +D03* +X79134Y18110D02* +D03* +X97638Y42126D02* +D03* +X96850Y27953D02* +D03* +X87008Y60236D02* +D03* +X30709Y50787D02* +D03* +X11417Y34646D02* +D03* +X12992Y27559D02* +D03* +X15748Y61417D02* +D03* +X63386Y57087D02* +D03* +X39764Y41732D02* +D03* +X64173Y37795D02* +D03* +X73622Y33071D02* +D03* +M02*
manufacturing/Buck12V5V.GKOadded+17@@ -0,0 +1,17 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=16711935* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +M02*
manufacturing/Buck12V5V.GM1added+17@@ -0,0 +1,17 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=16711935* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +M02*
manufacturing/Buck12V5V.GM13added+269@@ -0,0 +1,269 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=16711935* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD10C,0.00197*% +%ADD11C,0.00394*% +D10* +X15157Y31102D02* +G03* +X15157Y31102I-984J0D01* +G01* +X97835Y17323D02* +G03* +X97835Y17323I-984J0D01* +G01* +X3937Y3937D02* +Y11811D01* +Y3937D02* +X11811D01* +Y11811D01* +X3937D02* +X11811D01* +X3937Y66929D02* +Y74803D01* +Y66929D02* +X11811D01* +Y74803D01* +X3937D02* +X11811D01* +X3937Y35433D02* +Y43307D01* +Y35433D02* +X11811D01* +Y43307D01* +X3937D02* +X11811D01* +X98425Y66929D02* +Y74803D01* +Y66929D02* +X106299D01* +Y74803D01* +X98425D02* +X106299D01* +X98425Y3937D02* +Y11811D01* +Y3937D02* +X106299D01* +Y11811D01* +X98425D02* +X106299D01* +X3937Y51181D02* +Y59055D01* +Y51181D02* +X11811D01* +Y59055D01* +X3937D02* +X11811D01* +X3937Y19685D02* +Y27559D01* +Y19685D02* +X11811D01* +Y27559D01* +X3937D02* +X11811D01* +X98425Y51181D02* +Y59055D01* +Y51181D02* +X106299D01* +Y59055D01* +X98425D02* +X106299D01* +X98425Y35433D02* +Y43307D01* +Y35433D02* +X106299D01* +Y43307D01* +X98425D02* +X106299D01* +X98425Y19685D02* +Y27559D01* +Y19685D02* +X106299D01* +Y27559D01* +X98425D02* +X106299D01* +X27559Y19685D02* +X35433D01* +Y11811D02* +Y19685D01* +X27559Y11811D02* +X35433D01* +X27559D02* +Y19685D01* +D11* +X38780Y51968D02* +G03* +X38780Y51968I-12402J0D01* +G01* +X82677Y13583D02* +Y15551D01* +X78740D02* +X82677D01* +X78740Y13583D02* +Y15551D01* +Y13583D02* +X82677D01* +X88583Y15551D02* +Y17520D01* +Y15551D02* +X92520D01* +Y17520D01* +X88583D02* +X92520D01* +X19291Y28937D02* +Y30906D01* +Y28937D02* +X23228D01* +Y30906D01* +X19291D02* +X23228D01* +X19291Y22638D02* +Y24606D01* +Y22638D02* +X23228D01* +Y24606D01* +X19291D02* +X23228D01* +X43898Y61417D02* +X45866D01* +X43898Y57480D02* +Y61417D01* +Y57480D02* +X45866D01* +Y61417D01* +X43898Y53543D02* +X45866D01* +X43898Y49606D02* +Y53543D01* +Y49606D02* +X45866D01* +Y53543D01* +X43898Y41732D02* +X45866D01* +Y45669D01* +X43898D02* +X45866D01* +X43898Y41732D02* +Y45669D01* +X88583Y10039D02* +Y12008D01* +Y10039D02* +X92520D01* +Y12008D01* +X88583D02* +X92520D01* +X49409Y58268D02* +X51378D01* +X49409Y54331D02* +Y58268D01* +Y54331D02* +X51378D01* +Y58268D01* +X82874Y7087D02* +Y10236D01* +X83858Y7087D02* +Y10236D01* +X77559D02* +X83858D01* +X77559Y7087D02* +Y10236D01* +Y7087D02* +X83858D01* +X51968Y31890D02* +Y35039D01* +Y31890D02* +X58268D01* +Y35039D01* +X51968D02* +X58268D01* +X59449Y51575D02* +Y54724D01* +Y51575D02* +X65748D01* +Y54724D01* +X59449D02* +X65748D01* +X85827Y22736D02* +Y27657D01* +X77953D02* +X85827D01* +X77953Y22736D02* +Y27657D01* +Y22736D02* +X85827D01* +X87795Y57776D02* +Y62697D01* +X79921D02* +X87795D01* +X79921Y57776D02* +Y62697D01* +Y57776D02* +X87795D01* +Y66043D02* +Y70965D01* +X79921D02* +X87795D01* +X79921Y66043D02* +Y70965D01* +Y66043D02* +X87795D01* +X55512Y67323D02* +Y73622D01* +Y67323D02* +X68110D01* +Y73622D01* +X55512D02* +X68110D01* +X55512Y57874D02* +Y64173D01* +Y57874D02* +X68110D01* +Y64173D01* +X55512D02* +X68110D01* +X56693Y37598D02* +X58268Y39173D01* +Y49016D01* +X51968D02* +X58268D01* +X51968Y37598D02* +Y49016D01* +Y37598D02* +X56693D01* +X71653Y33071D02* +Y53543D01* +Y33071D02* +X93701D01* +Y53543D01* +X71653D02* +X93701D01* +X13386Y38976D02* +X39370D01* +X13386D02* +Y61024D01* +X39370Y38976D02* +Y61024D01* +X30374Y61377D02* +X32854D01* +X31614Y60137D02* +Y62617D01* +X13386Y61024D02* +X17323Y64961D01* +X35433D02* +X39370Y61024D01* +X17323Y64961D02* +X35433D01* +M02*
manufacturing/Buck12V5V.GM15added+279@@ -0,0 +1,279 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=32768* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD10C,0.00197*% +D10* +X11772Y7874D02* +G03* +X11772Y7874I-3898J0D01* +G01* +Y70866D02* +G03* +X11772Y70866I-3898J0D01* +G01* +X16339Y31102D02* +G03* +X16339Y31102I-2165J0D01* +G01* +X100394Y62992D02* +G03* +X100394Y62992I-3937J0D01* +G01* +X70472Y32677D02* +G03* +X70472Y32677I-3937J0D01* +G01* +X96850Y25591D02* +G03* +X96850Y25591I-3937J0D01* +G01* +X11772Y39370D02* +G03* +X11772Y39370I-3898J0D01* +G01* +X39370Y73819D02* +G03* +X39370Y73819I-3937J0D01* +G01* +X19882Y15551D02* +G03* +X19882Y15551I-3937J0D01* +G01* +X48819Y29921D02* +G03* +X48819Y29921I-3937J0D01* +G01* +X73228Y18898D02* +G03* +X73228Y18898I-3937J0D01* +G01* +X106260Y70866D02* +G03* +X106260Y70866I-3898J0D01* +G01* +Y7874D02* +G03* +X106260Y7874I-3898J0D01* +G01* +X11772Y55118D02* +G03* +X11772Y55118I-3898J0D01* +G01* +Y23622D02* +G03* +X11772Y23622I-3898J0D01* +G01* +X106260Y55118D02* +G03* +X106260Y55118I-3898J0D01* +G01* +Y39370D02* +G03* +X106260Y39370I-3898J0D01* +G01* +Y23622D02* +G03* +X106260Y23622I-3898J0D01* +G01* +X99016Y17323D02* +G03* +X99016Y17323I-2165J0D01* +G01* +X35394Y15748D02* +G03* +X35394Y15748I-3898J0D01* +G01* +X84646Y12598D02* +Y16535D01* +X76772D02* +X84646D01* +X76772Y12598D02* +Y16535D01* +Y12598D02* +X84646D01* +X86614Y14567D02* +Y18504D01* +Y14567D02* +X94488D01* +Y18504D01* +X86614D02* +X94488D01* +X17323Y27953D02* +Y31890D01* +Y27953D02* +X25197D01* +Y31890D01* +X17323D02* +X25197D01* +X17323Y21654D02* +Y25591D01* +Y21654D02* +X25197D01* +Y25591D01* +X17323D02* +X25197D01* +X42913Y63386D02* +X46850D01* +X42913Y55512D02* +Y63386D01* +Y55512D02* +X46850D01* +Y63386D01* +X42913Y55512D02* +X46850D01* +X42913Y47638D02* +Y55512D01* +Y47638D02* +X46850D01* +Y55512D01* +X42913Y39764D02* +X46850D01* +Y47638D01* +X42913D02* +X46850D01* +X42913Y39764D02* +Y47638D01* +X86614Y9055D02* +Y12992D01* +Y9055D02* +X94488D01* +Y12992D01* +X86614D02* +X94488D01* +X48189Y60276D02* +X52598D01* +X48189Y52323D02* +Y60276D01* +Y52323D02* +X52598D01* +Y60276D01* +X85630Y5906D02* +Y11417D01* +X75787D02* +X85630D01* +X75787Y5906D02* +Y11417D01* +Y5906D02* +X85630D01* +X49291Y30591D02* +Y36339D01* +Y30591D02* +X60945D01* +Y36339D01* +X49291D02* +X60945D01* +X56772Y50276D02* +Y56024D01* +Y50276D02* +X68425D01* +Y56024D01* +X56772D02* +X68425D01* +X87677Y21575D02* +Y28819D01* +X76102D02* +X87677D01* +X76102Y21575D02* +Y28819D01* +Y21575D02* +X87677D01* +X89646Y56614D02* +Y63858D01* +X78071D02* +X89646D01* +X78071Y56614D02* +Y63858D01* +Y56614D02* +X89646D01* +Y64882D02* +Y72126D01* +X78071D02* +X89646D01* +X78071Y64882D02* +Y72126D01* +Y64882D02* +X89646D01* +X52756Y65945D02* +Y75000D01* +Y65945D02* +X70866D01* +Y75000D01* +X52756D02* +X70866D01* +X52756Y56496D02* +Y65551D01* +Y56496D02* +X70866D01* +Y65551D01* +X52756D02* +X70866D01* +X47047Y49213D02* +X50984D01* +X47047Y37402D02* +Y49213D01* +X50984Y50000D02* +X59252D01* +X50984Y49213D02* +Y50000D01* +X47047Y37402D02* +X50984D01* +Y36614D02* +Y37402D01* +X59252Y49213D02* +Y50000D01* +Y49213D02* +X63189D01* +X59252Y36614D02* +Y37402D01* +X50984Y36614D02* +X59252D01* +X63189Y37402D02* +Y49213D01* +X59252Y37402D02* +X63189D01* +X68898Y31496D02* +Y55118D01* +Y31496D02* +X96457D01* +Y55118D01* +X68898D02* +X96457D01* +X22244Y33465D02* +Y37992D01* +Y33465D02* +X30512D01* +X12402Y37992D02* +X22244D01* +X30512Y33465D02* +Y37992D01* +X40354D01* +X12402D02* +Y61417D01* +X40354Y37992D02* +Y61417D01* +X12402D02* +X16929Y65945D01* +X22244D01* +X30512D02* +Y70472D01* +X35827Y65945D02* +X40354Y61417D01* +X30512Y65945D02* +X35827D01* +X22244D02* +Y70472D01* +X30512D01* +M02*
manufacturing/Buck12V5V.GPBadded+43@@ -0,0 +1,43 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=255* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD30C,0.06299*% +%ADD31C,0.05118*% +D30* +X7874Y7874D02* +D03* +Y70866D02* +D03* +X102362D02* +D03* +Y7874D02* +D03* +D31* +X7874Y39370D02* +D03* +Y55118D02* +D03* +Y23622D02* +D03* +X102362Y55118D02* +D03* +Y39370D02* +D03* +Y23622D02* +D03* +X31496Y15748D02* +D03* +M02*
manufacturing/Buck12V5V.GPTadded+218@@ -0,0 +1,218 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Color=255* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! TF.FilePolarity,Positive* +G04* +G01* +G75* +%ADD18C,0.01968*% +%ADD19R,0.01968X0.01968*% +%ADD20R,0.01968X0.01968*% +%ADD21C,0.03937*% +G04:AMPARAMS|DCode=22|XSize=22.05mil|YSize=24.41mil|CornerRadius=1.98mil|HoleSize=0mil|Usage=FLASHONLY|Rotation=270.000|XOffset=0mil|YOffset=0mil|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD22* +21,1,0.02205,0.02044,0,0,270.0* +21,1,0.01808,0.02441,0,0,270.0* +1,1,0.00397,-0.01022,-0.00904* +1,1,0.00397,-0.01022,0.00904* +1,1,0.00397,0.01022,0.00904* +1,1,0.00397,0.01022,-0.00904* +% +%ADD22ROUNDEDRECTD22*% +%ADD23R,0.02362X0.03543*% +G04:AMPARAMS|DCode=24|XSize=35.43mil|YSize=37.4mil|CornerRadius=1.95mil|HoleSize=0mil|Usage=FLASHONLY|Rotation=0.000|XOffset=0mil|YOffset=0mil|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD24* +21,1,0.03543,0.03350,0,0,0.0* +21,1,0.03154,0.03740,0,0,0.0* +1,1,0.00390,0.01577,-0.01675* +1,1,0.00390,-0.01577,-0.01675* +1,1,0.00390,-0.01577,0.01675* +1,1,0.00390,0.01577,0.01675* +% +%ADD24ROUNDEDRECTD24*% +%ADD25R,0.03248X0.05217*% +G04:AMPARAMS|DCode=26|XSize=45.28mil|YSize=70.87mil|CornerRadius=4.98mil|HoleSize=0mil|Usage=FLASHONLY|Rotation=0.000|XOffset=0mil|YOffset=0mil|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD26* +21,1,0.04528,0.06091,0,0,0.0* +21,1,0.03532,0.07087,0,0,0.0* +1,1,0.00996,0.01766,-0.03045* +1,1,0.00996,-0.01766,-0.03045* +1,1,0.00996,-0.01766,0.03045* +1,1,0.00996,0.01766,0.03045* +% +%ADD26ROUNDEDRECTD26*% +G04:AMPARAMS|DCode=27|XSize=52.17mil|YSize=23.62mil|CornerRadius=2.95mil|HoleSize=0mil|Usage=FLASHONLY|Rotation=180.000|XOffset=0mil|YOffset=0mil|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD27* +21,1,0.05217,0.01772,0,0,180.0* +21,1,0.04626,0.02362,0,0,180.0* +1,1,0.00591,-0.02313,0.00886* +1,1,0.00591,0.02313,0.00886* +1,1,0.00591,0.02313,-0.00886* +1,1,0.00591,-0.02313,-0.00886* +% +%ADD27ROUNDEDRECTD27*% +%ADD28R,0.08465X0.13780*% +G04:AMPARAMS|DCode=29|XSize=137.8mil|YSize=62.99mil|CornerRadius=5.04mil|HoleSize=0mil|Usage=FLASHONLY|Rotation=270.000|XOffset=0mil|YOffset=0mil|HoleType=Round|Shape=RoundedRectangle|* +%AMROUNDEDRECTD29* +21,1,0.13780,0.05291,0,0,270.0* +21,1,0.12772,0.06299,0,0,270.0* +1,1,0.01008,-0.02646,-0.06386* +1,1,0.01008,-0.02646,0.06386* +1,1,0.01008,0.02646,0.06386* +1,1,0.01008,0.02646,-0.06386* +% +%ADD29ROUNDEDRECTD29*% +%ADD30C,0.06299*% +%ADD31C,0.05118*% +D18* +X14173Y31102D02* +D03* +X96850Y17323D02* +D03* +D19* +X78740Y14567D02* +D03* +X82677D02* +D03* +X92520Y16535D02* +D03* +X88583D02* +D03* +X23228Y29921D02* +D03* +X19291D02* +D03* +X23228Y23622D02* +D03* +X19291D02* +D03* +X92520Y11024D02* +D03* +X88583D02* +D03* +D20* +X44882Y57480D02* +D03* +Y61417D02* +D03* +Y49606D02* +D03* +Y53543D02* +D03* +Y45669D02* +D03* +Y41732D02* +D03* +D21* +X96457Y62992D02* +D03* +X66535Y32677D02* +D03* +X92913Y25591D02* +D03* +X35433Y73819D02* +D03* +X15945Y15551D02* +D03* +X44882Y29921D02* +D03* +X69291Y18898D02* +D03* +D22* +X50394Y54409D02* +D03* +Y58189D02* +D03* +D23* +X77953Y8661D02* +D03* +X83465D02* +D03* +D24* +X58169Y33465D02* +D03* +X52067D02* +D03* +X65650Y53150D02* +D03* +X59547D02* +D03* +D25* +X78740Y25197D02* +D03* +X85039D02* +D03* +X80709Y60236D02* +D03* +X87008D02* +D03* +X80709Y68504D02* +D03* +X87008D02* +D03* +D26* +X67618Y70472D02* +D03* +X56004D02* +D03* +X67618Y61024D02* +D03* +X56004D02* +D03* +D27* +X50640Y39567D02* +D03* +Y43307D02* +D03* +Y47047D02* +D03* +X59597D02* +D03* +Y43307D02* +D03* +Y39567D02* +D03* +D28* +X91240Y43307D02* +D03* +X74114D02* +D03* +D29* +X26378Y41339D02* +D03* +Y62598D02* +D03* +D30* +X7874Y7874D02* +D03* +Y70866D02* +D03* +X102362D02* +D03* +Y7874D02* +D03* +D31* +X7874Y39370D02* +D03* +Y55118D02* +D03* +Y23622D02* +D03* +X102362Y55118D02* +D03* +Y39370D02* +D03* +Y23622D02* +D03* +X31496Y15748D02* +D03* +M02*
manufacturing/Buck12V5V.GTLadded+1976@@ -0,0 +1,1976 @@+G04* +G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,26.11.1 (5)* +G04* +G04 Layer_Physical_Order=1* +G04 Layer_Color=255* +G04 Board_Origin=0|0* +%FSLAX25Y25*% +%MOIN*% +G70* +G04* +G04 #@! TF.SameCoordinates,ECB2CA4D-E8FD-461C-A660-8C4C181FACA3* +G04* +G04* +G04 #@! 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manufacturing/Buck12V5V.TXTadded+46@@ -0,0 +1,46 @@+M48 +;Layer_Color=9474304 +;FILE_FORMAT=2:5 +INCH,LZ +;TYPE=PLATED +T01F00S00C0.01181 +T02F00S00C0.01575 +T03F00S00C0.03071 +T04F00S00C0.04724 +% +T01 +X0023228Y0029921 +X0045276Y0045276 +X0050787Y0043307 +X0055118Y0037008 +X0061811Y0036417 +X0069095Y0053347 +T02 +X0012992Y0027559 +X0011417Y0034646 +X0015748Y0061417 +X0032283Y0057087 +X0030709Y0050787 +X0039764Y0041732 +X0064173Y0037795 +X0073622Y0033071 +X0079134Y001811 +X008937Y0019291 +X009685Y0027953 +X0097638Y0042126 +X0087008Y0060236 +X0063386Y0057087 +T03 +X0007874Y0023622 +Y003937 +Y0055118 +X0031496Y0015748 +X0102362Y0023622 +Y003937 +Y0055118 +T04 +X0007874Y0007874 +Y0070866 +X0102362 +Y0007874 +M30
manufacturing/Pick Place for Buck12V5V.csv added+21@@ -0,0 +1,21 @@+Center-X(mm),Center-Y(mm),Comment,Description,Designator,Footprint,Layer,Rotation +23.0000,2.8000,10k,,R8,CR0402-FX-1002GLF,TopLayer,0 +23.0000,4.2000,10k,,R7,CR0402-FX-1002GLF,TopLayer,0 +20.5000,2.2000,green,,D1,IN-S63BTG,TopLayer,180 +20.5000,3.7000,2.2k,,R6,CR0402-FX-2201GLF,TopLayer,180 +5.4000,6.0000,150k,,R5,CR0402-FX-1503GLF,TopLayer,0 +5.4000,7.6000,1M,,R4,CR0402-FX-1004GLF,TopLayer,0 +11.4000,11.1000,10k,,R3,CR0402-FX-1002GLF,TopLayer,90 +11.4000,13.1000,5.6k,,R2,CR0402-FX-5601GLF,TopLayer,270 +11.4000,15.1000,68k,,R1,CR0402-FX-6802GLF,TopLayer,270 +12.8000,14.3000,68pF C0G,,C9,0402N680J500CT,TopLayer,270 +20.8000,6.4000,22uF 10V,,C8,CL21A226MPQNNNE,TopLayer,180 +21.3000,17.4000,22uF 10V,,C7,CL21A226MPQNNNE,TopLayer,180 +21.3000,15.3000,22uF 10V,,C6,CL21A226MPQNNNE,TopLayer,180 +14.0000,8.5000,100nF 50V,,C5,0603B104J500CT,TopLayer,0 +15.9000,13.5000,100nF 50V,,C4,0603B104J500CT,TopLayer,0 +15.7000,17.9000,10uF 25V,,C3,CC1206KKX7R8BB106,TopLayer,0 +15.7000,15.5000,10uF 25V,,C2,CC1206KKX7R8BB106,TopLayer,0 +6.7000,13.2000,47uF 35V,,C1,EEE-FK1V470P,TopLayer,270 +21.0000,11.0000,15uH,,L1,AMPLH5030S-150MT,TopLayer,0 +14.0000,11.0000,TPS54202DDCR,,U1,TPS54202DDCR,TopLayer,180
manufacturing/bom-jlcpcb.csvadded+15@@ -0,0 +1,15 @@+Comment,Designator,Footprint,LCSC Part # +47uF 35V,C1,EEE-FK1V470P, +10uF 25V,"C2, C3",CC1206KKX7R8BB106,C70462 +100nF 50V,"C4, C5",0603B104J500CT,C119027 +22uF 10V,"C6, C7, C8",CL21A226MPQNNNE,C29277 +68pF C0G,C9,0402N680J500CT,C301990 +green,D1,IN-S63BTG,C5740463 +15uH,L1,AMPLH5030S-150MT, +68k,R1,CR0402-FX-6802GLF,C2085395 +5.6k,R2,CR0402-FX-5601GLF,C2077074 +10k,"R3, R7, R8",CR0402-FX-1002GLF,C202396 +1M,R4,CR0402-FX-1004GLF,C202398 +150k,R5,CR0402-FX-1503GLF,C21547414 +2.2k,R6,CR0402-FX-2201GLF,C2076845 +TPS54202DDCR,U1,TPS54202DDCR,C191884
manufacturing/cpl-jlcpcb.csvadded+21@@ -0,0 +1,21 @@+Designator,Mid X,Mid Y,Layer,Rotation +R8,23.0000mm,2.8000mm,Top,0 +R7,23.0000mm,4.2000mm,Top,0 +D1,20.5000mm,2.2000mm,Top,180 +R6,20.5000mm,3.7000mm,Top,180 +R5,5.4000mm,6.0000mm,Top,0 +R4,5.4000mm,7.6000mm,Top,0 +R3,11.4000mm,11.1000mm,Top,90 +R2,11.4000mm,13.1000mm,Top,270 +R1,11.4000mm,15.1000mm,Top,270 +C9,12.8000mm,14.3000mm,Top,270 +C8,20.8000mm,6.4000mm,Top,180 +C7,21.3000mm,17.4000mm,Top,180 +C6,21.3000mm,15.3000mm,Top,180 +C5,14.0000mm,8.5000mm,Top,0 +C4,15.9000mm,13.5000mm,Top,0 +C3,15.7000mm,17.9000mm,Top,0 +C2,15.7000mm,15.5000mm,Top,0 +C1,6.7000mm,13.2000mm,Top,270 +L1,21.0000mm,11.0000mm,Top,0 +U1,14.0000mm,11.0000mm,Top,180
molecule/buck-12v5v-altium.glbadded⋯ 1 unchanged line ⋯
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