← Commit history
README.md+57
@@ -63,3 +63,60 @@ The library appears as `PCM_tps54202-12v-5v-buck-20261018` (package `inc.adom.wi - **Assembled Board STEP Twin**: [`build/board.step`](build/board.step) - **Project Engineering Datasheet (PDF)**: [`docs/datasheet.pdf`](docs/datasheet.pdf) - **AI Flow Build Report & Process Video**: [`docs/runs/tps54202-buck-12v5v-antigravity-20261018-1555/README.md`](docs/runs/tps54202-buck-12v5v-antigravity-20261018-1555/README.md)++<!-- aiflow:steps -->+## How this board was built++Every step of the build, in order, each with its own page of evidence (checks, screenshots, the AI's drawings and usage), written by [adom-aiflow](https://wiki.adom.inc/adom/adom-aiflow) as the run went.++**1. Intake**: read the prompt and the requirements. [The evidence](steps/01-intake/README.md)++**2. Design rules**: choose the fab, load its design rules. [The evidence](steps/02-rules/README.md)++**3. Circuit design**: datasheet math and part values. [The evidence](steps/03-design/README.md)++**4. Test plan**: what to measure on the workcell, a probe spot for each. [The evidence](steps/04-test-plan/README.md)++**5. Sourcing**: every part in stock, with an MPN. [The evidence](steps/05-sourcing/README.md)++**6. Parts on the wiki**: every part's wiki page, shown as it is picked. [The evidence](steps/06-parts/README.md)++**7. Project page**: README rev 1, component table, KiCad PCM repo. [The evidence](steps/07-project-page/README.md)++**8. Library**: symbols, footprints and 3D from the wiki. [The evidence](steps/08-library/README.md)++**9. Schematic**: drawn live, checked against the netlist. [The evidence](steps/09-schematic/README.md)++**10. SPICE simulation**: the drawn schematic in SPICE: start-up, ripple, load step. [The evidence](steps/10-simulation/README.md)++**11. Components**: wiki component identity and CAD audit. [The evidence](steps/11-components/README.md)++**12. 3D models**: every 3D model bound and upright. [The evidence](steps/12-models/README.md)++**13. Placement**: parts placed for current and heat. [The evidence](steps/13-placement/README.md)++**14. Routing**: every trace routed, DRC clean. [The evidence](steps/14-routing/README.md)++**15. Heatsink vias**: via arrays under the hot parts. [The evidence](steps/15-thermal-vias/README.md)++**16. Copper pours**: copper pours and stitching. [The evidence](steps/16-pours/README.md)++**17. Rounded corners**: sharp board corners rounded. [The evidence](steps/17-outline/README.md)++**18. Current**: current density on every loaded net. [The evidence](steps/18-current/README.md)++**19. Thermal**: temperature rise against the budget. [The evidence](steps/19-thermal/README.md)++**20. Fields**: current and heat solved in 3D. [The evidence](steps/20-fields/README.md)++**21. Pour walkthrough**: each pour net lit in turn. [The evidence](steps/21-nets/README.md)++**22. Silkscreen**: labels, polarity, pinouts, both faces. [The evidence](steps/22-silkscreen/README.md)++**23. 3D board**: the finished board in 3D. [The evidence](steps/23-3d/README.md)++**24. Finish line**: 0 unconnected, 0 errors, every check passed. [The evidence](steps/24-finish/README.md)++**25. Gerbers, BOM, CPL**: manufacturing files written and checked. [The evidence](steps/25-export/README.md)++<!-- /aiflow:steps -->
steps/09-schematic/README.md−8
@@ -41,14 +41,6 @@ drawn live, checked against the netlist  ![end](shot-schematic-3-end.png) -**visit 3-end**--![visit 3-end](shot-schematic-3-end.png)--**visit 3-start**--![visit 3-start](shot-schematic-3-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-7342418-20261018-183341-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-7342418-20261018-183341-poster.jpg" title="Schematic, visit 3 (10x)" muted="true"}
steps/10-simulation/README.md−8
@@ -22,14 +22,6 @@ the drawn schematic in SPICE: start-up, ripple, load step  ![end](shot-simulation-1-end.png) -**visit 1-end**--![visit 1-end](shot-simulation-1-end.png)--**visit 1-start**--![visit 1-start](shot-simulation-1-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-787678-20261018-183804-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-787678-20261018-183804-poster.jpg" title="SPICE simulation, visit 1 (10x)" muted="true"}
steps/11-components/README.md−4
@@ -12,10 +12,6 @@ Audit wiki component identity, reusable CAD quality and redistribution evidence  ![start](shot-components-1-start.png) -**visit 1-start**--![visit 1-start](shot-components-1-start.png)- ## AI usage (Google Antigravity)  36 model calls: 297,979 fresh input, 6,902,609 cached input and 15,456 output tokens.
steps/12-models/README.md−4
@@ -29,10 +29,6 @@ Check native board model resolution and inspect the selected library variants in  ![start](shot-models-1-start.png) -**visit 1-start**--![visit 1-start](shot-models-1-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-10752118-20261018-193821-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-10752118-20261018-193821-poster.jpg" title="3D models, visit 1 (10x)" muted="true"}
steps/13-placement/README.md−12
@@ -28,18 +28,6 @@ place the parts for routability, current and heat; the binary packs, checks cour  ![end](shot-placement-2-end.png) -**visit 1-start**--![visit 1-start](shot-placement-1-start.png)--**visit 2-end**--![visit 2-end](shot-placement-2-end.png)--**visit 2-start**--![visit 2-start](shot-placement-2-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-3543304-20261018-194858-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-3543304-20261018-194858-poster.jpg" title="Placement, visit 1 (10x)" muted="true"}
steps/14-routing/README.md−24
@@ -44,30 +44,6 @@ route to 100 percent with the spec's rules, gate with KiCad's DRC, land as undo  ![end](shot-routing-3-end.png) -**visit 1-end**--![visit 1-end](shot-routing-1-end.png)--**visit 1-start**--![visit 1-start](shot-routing-1-start.png)--**visit 2-end**--![visit 2-end](shot-routing-2-end.png)--**visit 2-start**--![visit 2-start](shot-routing-2-start.png)--**visit 3-end**--![visit 3-end](shot-routing-3-end.png)--**visit 3-start**--![visit 3-start](shot-routing-3-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-202614-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-202614-poster.jpg" title="Routing, visit 1 (10x)" muted="true"}
steps/15-thermal-vias/README.md−16
@@ -39,22 +39,6 @@ Heatsink vias where the heat is: for every part that dissipates real power (the  ![end](shot-thermal-vias-2-end.png) -**visit 1-end**--![visit 1-end](shot-thermal-vias-1-end.png)--**visit 1-start**--![visit 1-start](shot-thermal-vias-1-start.png)--**visit 2-end**--![visit 2-end](shot-thermal-vias-2-end.png)--**visit 2-start**--![visit 2-start](shot-thermal-vias-2-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-204615-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-204615-poster.jpg" title="Heatsink vias, visit 1 (10x)" muted="true"}
steps/16-pours/README.md−32
@@ -53,38 +53,6 @@ pour every net the spec names, keepouts along Kelvin taps, thermal and stitching  ![end](shot-pours-4-end.png) -**visit 1-end**--![visit 1-end](shot-pours-1-end.png)--**visit 1-start**--![visit 1-start](shot-pours-1-start.png)--**visit 2-end**--![visit 2-end](shot-pours-2-end.png)--**visit 2-start**--![visit 2-start](shot-pours-2-start.png)--**visit 3-end**--![visit 3-end](shot-pours-3-end.png)--**visit 3-start**--![visit 3-start](shot-pours-3-start.png)--**visit 4-end**--![visit 4-end](shot-pours-4-end.png)--**visit 4-start**--![visit 4-start](shot-pours-4-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-210526-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-210526-poster.jpg" title="Copper pours, visit 1 (10x)" muted="true"}
steps/17-outline/README.md−24
@@ -42,30 +42,6 @@ Round the board's corners: every sharp outline corner becomes a radius (1.0 mm b  ![end](shot-outline-3-end.png) -**visit 1-end**--![visit 1-end](shot-outline-1-end.png)--**visit 1-start**--![visit 1-start](shot-outline-1-start.png)--**visit 2-end**--![visit 2-end](shot-outline-2-end.png)--**visit 2-start**--![visit 2-start](shot-outline-2-start.png)--**visit 3-end**--![visit 3-end](shot-outline-3-end.png)--**visit 3-start**--![visit 3-start](shot-outline-3-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-211126-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-211126-poster.jpg" title="Rounded corners, visit 1 (10x)" muted="true"}
steps/18-current/README.md−8
@@ -80,14 +80,6 @@ IPC-2221 on every loaded net, pour and via capacity, the same-layer rule; then t  ![end](shot-current-3-end.png) -**visit 1-start**--![visit 1-start](shot-current-1-start.png)--**visit 2-end**--![visit 2-end](shot-current-2-end.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-221050-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-221050-poster.jpg" title="Current, visit 2 (10x)" muted="true"}
steps/19-thermal/README.md+8−16
@@ -75,29 +75,21 @@ copper and vias at every hot tab against the rise budget; then the AI's own temp  ![end](shot-thermal-2-end.png) -**visit 1-end**+**visit vias-1-end** -![visit 1-end](shot-thermal-1-end.png)+![visit vias-1-end](shot-thermal-vias-1-end.png) -**visit 1-net-GND**+**visit vias-1-start** -![visit 1-net-GND](shot-thermal-1-net-GND.png)+![visit vias-1-start](shot-thermal-vias-1-start.png) -**visit 1-net-VOUT**+**visit vias-2-end** -![visit 1-net-VOUT](shot-thermal-1-net-VOUT.png)+![visit vias-2-end](shot-thermal-vias-2-end.png) -**visit 1-start**+**visit vias-2-start** -![visit 1-start](shot-thermal-1-start.png)--**visit 2-end**--![visit 2-end](shot-thermal-2-end.png)--**visit 2-net-GND**--![visit 2-net-GND](shot-thermal-2-net-GND.png)+![visit vias-2-start](shot-thermal-vias-2-start.png)  ## Clips 
steps/20-fields/README.md−8
@@ -25,14 +25,6 @@ the fields on the board: adom-fields solves the current density of every loaded  ![fields-end](shot-fields-1-fields-end.png) -**visit 1-fields-end**--![visit 1-fields-end](shot-fields-1-fields-end.png)--**visit 1-fields-start**--![visit 1-fields-start](shot-fields-1-fields-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-7997818-20261018-224547-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-7997818-20261018-224547-poster.jpg" title="Fields, visit 1 (10x)" muted="true"}
steps/21-nets/README.md−24
@@ -38,30 +38,6 @@ the copper pour walkthrough: every poured net (and every loaded, wide or Kelvin  ![end](shot-nets-1-end.png) -**visit 1-end**--![visit 1-end](shot-nets-1-end.png)--**visit 1-net-GND**--![visit 1-net-GND](shot-nets-1-net-GND.png)--**visit 1-net-SW**--![visit 1-net-SW](shot-nets-1-net-SW.png)--**visit 1-net-VIN**--![visit 1-net-VIN](shot-nets-1-net-VIN.png)--**visit 1-net-VOUT**--![visit 1-net-VOUT](shot-nets-1-net-VOUT.png)--**visit 1-start**--![visit 1-start](shot-nets-1-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-225853-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-225853-poster.jpg" title="Pour walkthrough, visit 1 (10x)" muted="true"}
steps/22-silkscreen/README.md−4
@@ -35,10 +35,6 @@ Make both faces useful in real service: references and values, verified connecto  ![start](shot-silkscreen-1-start.png) -**visit 1-start**--![visit 1-start](shot-silkscreen-1-start.png)- ## AI usage (Google Antigravity)  98 model calls: 492,151 fresh input, 11,644,749 cached input and 86,387 output tokens.
steps/23-3d/README.md−12
@@ -26,18 +26,6 @@ the 3D walkthrough: the viewer opened from the editor, then fit, top, tilt, orbi  ![3d-end](shot-3d-1-3d-end.png) -**visit 1-3d-end**--![visit 1-3d-end](shot-3d-1-3d-end.png)--**visit 1-3d-start**--![visit 1-3d-start](shot-3d-1-3d-start.png)--**visit 1-start**--![visit 1-start](shot-3d-1-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-123799660-20261018-233132-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-123799660-20261018-233132-poster.jpg" title="3D board, visit 1 (10x)" muted="true"}
steps/24-finish/README.md−4
@@ -12,10 +12,6 @@ finish refuses until everything is true; the AI cuts the video and delivers  ![start](shot-finish-1-start.png) -**visit 1-start**--![visit 1-start](shot-finish-1-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-233519-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-233519-poster.jpg" title="Finish line, visit 1 (10x)" muted="true"}
steps/25-export/README.md−4
@@ -32,10 +32,6 @@ The finish line for the human: Gerbers, drill, BOM and pick-and-place (CPL) writ  ![start](shot-export-1-start.png) -**visit 1-start**--![visit 1-start](shot-export-1-start.png)- ## Clips  ::adom-video{video="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-233655-10x.mp4" poster="/john/tps54202-12v-5v-buck-20261018/render/docs/clips/window-19530338-20261018-233655-poster.jpg" title="Gerbers, BOM, CPL, visit 1 (10x)" muted="true"}