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adom-aiflow: step evidence (finish)

John Lauer ·b52b31e97b ·1d ago ·parent 9e6eb36
2 files changed +8−42
board/README.md+2
@@ -102,4 +102,6 @@ Every step of the build, in order, each with its own page of evidence (checks, s  **23. 3d**: . [The evidence](steps/23-3d/README.md) +**24. finish**: . [The evidence](steps/24-finish/README.md)+ <!-- /aiflow:steps -->
board/steps/24-finish/README.md+6−42
@@ -1,51 +1,15 @@-# Step 24: Finish line+# Step 24: finish+ -finish refuses until everything is true; the AI cuts the video and delivers  ## Visits -- 2026-11-07T00:26:22Z-- 2026-11-07T03:24:38Z-- 2026-11-07T03:38:53Z+- 2026-11-09T01:47:18Z  ## What the binary checked  ### finish-checks -- **lines**: power inputs: 2 (J1 VBUS, TP3 VBUS), 1 labelled with a voltage, 1 without one, test points: 15 (TP1 VBAT, TP10 ECHO_EVT, TP11 IR850_G, TP12 IR850_D, TP13 IR940_D, TP14 LED_D0, TP15 UPDI, TP2 3V3, TP3 VBUS, TP4 PROG, TP5 CHG_STAT, TP6 VLED, ...), all labelled with their net, LED states: no LEDs on the board: led-states.json not required, programming: U1 ATtiny1616-MNR, interface updi with declared access checked-- **powerInputs**: found 2; labelled 1; mismatched 0; unlabelled 1-- **testPoints**: found 15; labelled 15; mismatched 0; unlabelled 0--## Screenshots and drawings--**start**--![start](shot-finish-1-start.png)--**start**--![start](shot-finish-2-start.png)--**start**--![start](shot-finish-3-start.png)--**visit 1-start**--![visit 1-start](shot-finish-1-start.png)--**visit 2-start**--![visit 2-start](shot-finish-2-start.png)--**visit 3-start**--![visit 3-start](shot-finish-3-start.png)--## Clips--::adom-video{video="/john/ghost-hand/render/docs/clips/window-592666-20261107-002623-10x.mp4" poster="/john/ghost-hand/render/docs/clips/window-592666-20261107-002623-poster.jpg" title="Finish line, visit 1 (10x)" muted="true"}--::adom-video{video="/john/ghost-hand/render/docs/clips/window-723656-20261107-032528-10x.mp4" poster="/john/ghost-hand/render/docs/clips/window-723656-20261107-032528-poster.jpg" title="Finish line, visit 2 (10x)" muted="true"}--::adom-video{video="/john/ghost-hand/render/docs/clips/window-723656-20261107-034024-10x.mp4" poster="/john/ghost-hand/render/docs/clips/window-723656-20261107-034024-poster.jpg" title="Finish line, visit 3 (10x)" muted="true"}+- **lines**: power inputs: 2 (J1 VBUS, TP3 VBUS), all labelled with a voltage, test points: 15 (TP1 VBAT, TP10 ECHO_EVT, TP11 IR850_G, TP12 IR850_D, TP13 IR940_D, TP14 LED_D0, TP15 UPDI, TP2 3V3, TP3 VBUS, TP4 PROG, TP5 CHG_STAT, TP6 VLED, ...), 13 labelled with their net, 0 unlabelled, 2 labelled with another net, LED states: no LEDs on the board: led-states.json not required, programming: U1 ATtiny1616-MNR, interface updi with declared access checked+- **powerInputs**: found 2; labelled 2; mismatched 0; unlabelled 0+- **testPoints**: found 15; labelled 13; mismatched 2; unlabelled 0