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AIFLOW-GAPS.md+3−5
@@ -20,9 +20,8 @@ Proposed direction (John's question, 2026-09-29): keep the binary as **instrumen | 6 | Datasheet calculations | L, COUT, CIN, feedback divider, feed-forward cap and EN UVLO derived by hand from the datasheet equations. There is no step that records the design equations next to the values. | skill (+ instrument: calcs as an artifact) | | 7 | Simulation | ngspice was not installed; installed it. No simulation step or gate (startup, load step, ripple, loop gain). | skill + gate | | 8 | Schematic + netlist to board | No path from a schematic to a netlisted `.kicad_pcb`; the KiCad bridge has no "update PCB from schematic" verb. Generated both from one netlist and checked equivalence. | gate (sch↔pcb netlist equivalence) |-| 9 | Molecule format | John: "make sure you make a molecule so it fits into our scaffold". aiflow does not know about molecules (machine pins, contacts, outline grid). | skill + gate (molecule conformance) |+| 9 | Molecule format | John: "make sure you make a molecule". aiflow does not know about molecules (machine pins, contacts, outline grid). | skill + gate (molecule conformance) | | 10 | Fab design rules | aiflow's DRC uses the board's own rules; nothing loads the target fab's process limits (3rd party fab or JLCPCB profile). | gate |-| 11 | Scaffold + control panel | John: "place this on a scaffold at the end to show how it will connect to our control panel for a live probing workcell". No step after `finish` places the molecule in a workcell layout. The flow file lists "moleculize, paste, probe" as later steps, but they are not implemented. | skill (+ gate: layout references valid pins) |  ## Skills this run will add to adom/adom-aiflow `skills/` @@ -35,14 +34,13 @@ Each is written from what this run actually did, when that phase ends. The binar | `aiflow-circuit-design` | 6, 7: datasheet equations as a script next to the values; ngspice loop gain + switching transient; how to label a fitted model honestly | planned | | `aiflow-schematic-to-board` | 8: one netlist → `.kicad_sch` + `.kicad_pcb`, ERC, netlist equivalence | planned | | `aiflow-molecule` | 9, 10: molecule outline, machine pins, contacts, fab rules profile | planned |-| `aiflow-scaffold-probe` | 11: place the molecule on a scaffold, wire it to the control panel, probe plan | planned |  ## Findings to fold into the skills  - **Sourcing: search by spec, in stock, before naming an MPN.** Remembered first choices (Coilcraft XAL5050-153, Murata GRM31CR71E106KA12L) had zero Mouser stock with 180 to 280 day leads. `adom-parts-search search "<spec words>" --in-stock-only` found equivalents at once. The sourcing skill should make the spec search the first move and record stock + lead with a date in the BOM. - **Stocked passives shape the math.** The 41-value resistor set forced a series pair (68k + 5.6k) for the feedback divider; the calcs script searches stocked combinations instead of assuming E96. - **Simulation without a vendor model.** TI's internal compensation is unpublished, so the loop model is an equivalent calibrated to the datasheet's own crossover equation (eq 14), labelled as such. The two-model split worked: an averaged AC model for loop gain and a cycle-by-cycle XSPICE latch model for startup, ripple and load steps. The switching model matched the hand calcs (ripple current 0.40 vs 0.39 A). ngspice syntax traps worth a line in the skill: B-source logic is `||`/`&&`; `d_srlatch` needs enable + async set/reset (NULL); `wrdata` phase is radians; system matplotlib needs `PYTHONNOUSERSITE=1` when a user-site numpy 2 is present.-- **Model limits decide, not the prettiest number.** 100 pF Cff (eq 16) gave the best phase margin in the model but pushed crossover to ~57 kHz, past the datasheet's 40 kHz limit that the equivalent model can't see; 68 pF was chosen. The skill should say: when a fitted model and a datasheet limit disagree, obey the limit and plan a bench check (here: a load step on the probing workcell).+- **Model limits decide, not the prettiest number.** 100 pF Cff (eq 16) gave the best phase margin in the model but pushed crossover to ~57 kHz, past the datasheet's 40 kHz limit that the equivalent model can't see; 68 pF was chosen. The skill should say: when a fitted model and a datasheet limit disagree, obey the limit and plan a bench check (here: a real load step).  ## Later gaps @@ -89,7 +87,7 @@ Still open: 23 (land route resume), 25 (router layer policy), 26 (pack rotations  | row | fix | |---|---|-| 2 to 20, 25, 26, 30, 32 | 0.1.34: ten companion skills (intake, sourcing, circuit design, simulate, schematic to board, molecule, power layout, credentials, live clips, scaffold probe) and a companion-skills table in the main skill; the gate/binary halves stay open |+| 2 to 20, 25, 26, 30, 32 | 0.1.34: nine companion skills (intake, sourcing, circuit design, simulate, schematic to board, molecule, power layout, credentials, live clips) and a companion-skills table in the main skill; the gate/binary halves stay open | | 29 (clip manifest) | 0.1.35: `recut` and `compose` recover clip files from the ledger by recording id (5 of 14 came back here); the via net enforcement half stays open | | 34 (new) | `compose` wrote run-relative paths into ffmpeg concat lists, so a relative `--run` could never assemble the video; 0.1.35 writes absolute paths | | 35 (new, open) | a clip stop records `./run/<clip>.mp4` as the local file even when the pull from the desktop failed: 4 of 14 clips (components, current, silkscreen, routing 2) never reached the container and nothing said so. The stop should check the file landed, retry the pull, and flag the capture `pullFailed` with the remote path so `recut` can fetch it later. By the time the pull was retried the desktop's recordings folder had been cleaned, so these four clips are gone for good: the pull has to be verified before the stop returns, not later |
README.md+2−5
@@ -1,8 +1,8 @@-# 12 V to 5 V / 1 A Buck Molecule (TPS54202) on a Probing Scaffold+# 12 V to 5 V / 1 A Buck Molecule (TPS54202)  ![The buck molecule in KiCad's native 3D viewer: VIN, GND and EN contacts on the left, VOUT, GND and VMON on the right, four corner machine pins](docs/img/board-3d.png) -A 12 V to 5 V, 1 A synchronous buck on the TI TPS54202, designed as a 28 x 20 mm Adom molecule that plugs into a scaffold wired to the control panel for live probing.+A 12 V to 5 V, 1 A synchronous buck on the TI TPS54202, designed as a 28 x 20 mm Adom molecule.  It takes the brief from the YouTube video "Hardware Design with GPT-6: Schematic, PSpice & PCB" by Inside Embedded (12 V in, 5 V at 1 A out, terminals, test points) and designs it again from scratch. Every value comes from the datasheet equations. The loop and the switching behaviour were simulated in ngspice, and the result was checked against TI's own PSpice model. The board was placed, routed, poured and analysed in a measured adom-aiflow run in KiCad 10. @@ -59,13 +59,11 @@ Probe pads: TP1 SW (15.6, 4.9), TP2 FB (9.4, 5.6), TP3 VOUT (21.6, 4.9), TP4 GND | [Sourcing](docs/sourcing.md) | The BOM with Mouser part numbers, the 3rd party fab sourcing policy, and where every 3D model came from. | | [Board](docs/board.md) | Molecule format, placement, routing and its hand rework, pours with the SW patch, the DRC gate, copper and silkscreen. | | [Thermal and current](docs/thermal-current.md) | Adom Fields current density (SW neck 215 to 50 A/mm2), heat paths, and the approved still-air budget. |-| [Scaffold](docs/scaffold.md) | The molecule on a scaffold wired to the control panel for live probing. | | [aiflow run](docs/aiflow-run.md) | Step timings, what aiflow did and what the AI did, and the aiflow gaps this run found (and which were fixed in 0.1.33). | | [Rework clips](docs/clips-rework.md) | The second run: the reroute, the pours again, the analyses and the silkscreen placed live. | | [Build clips](docs/clips.md) | Every step's video clip from the adom-aiflow run. | | [The process video](docs/process-video.md) | How the video was made: the clips behind each scene, the voice-over script and the tools. | -![The molecule on a LrgMed scaffold, wired to the Control Panel scaffold](docs/img/scaffold-iso.png)  ## What is in this repo @@ -76,7 +74,6 @@ Probe pads: TP1 SW (15.6, 4.9), TP2 FB (9.4, 5.6), TP3 VOUT (21.6, 4.9), TP4 GND | `kicad/` | KiCad 10 project: schematic, board, design rules, the netlist the board was generated from, the generators, project libraries and every 3D model | | `aiflow/spec.json` | the electrical judgement aiflow worked from: wide nets, Kelvin taps, loads, hot parts, pours, the thermal budget | | `molecule/` | the molecule STEP (KiCad 10 export), the anchored GLB and the footprint and symbol JSON from `step2glb` |-| `scaffold/` | the Hydrogen v2 layout, the probe plan and a three.js preview | | `tools/` | the live-routing, silkscreen and clips helpers used in the run, and the remote kicad-cli wrapper | | `AIFLOW-GAPS.md` | everything aiflow did not guide in this run, as it happened | | `docs/runs/` | the report aiflow generated for the run |
aiflow/spec.json+1−1
@@ -17,7 +17,7 @@   "J5",   "J6"  ],- "fixedRefsNote": "the molecule interface: four corner machine pins (GND) and six contacts on the 2 mm grid; the scaffold and the control-panel wiring depend on these positions",+ "fixedRefsNote": "the molecule interface: four corner machine pins (GND) and six contacts on the 2 mm grid; everything that connects to the molecule depends on these positions",  "planes": {},  "wideNets": {   "VIN": [
design/bom.csv+6−6
@@ -19,12 +19,12 @@ R6,2.2k,LED resistor,CR0402-FX-2201GLF,Bourns,0402,Adom stock,,,1.4 mA R7,10k,VMON divider top (VOUT to VMON),CR0402-FX-1002GLF,Bourns,0402,Adom stock,,,VMON = VOUT/2 = 2.5 V for a 3.3 V ADC R8,10k,VMON divider bottom (VMON to GND),CR0402-FX-1002GLF,Bourns,0402,Adom stock,,,VMON source impedance 5 k D1,green LED,5 V power-good indicator,IN-S63BTG,Inolux,0603,Adom stock,,,-J1,MachineContactMedium,molecule contact (VIN),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,scaffold contact pressed into the board-J2,MachineContactMedium,molecule contact (GND),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,scaffold contact pressed into the board-J3,MachineContactMedium,molecule contact (EN),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,scaffold contact pressed into the board-J4,MachineContactMedium,molecule contact (VOUT),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,scaffold contact pressed into the board-J5,MachineContactMedium,molecule contact (GND),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,scaffold contact pressed into the board-J6,MachineContactMedium,molecule contact (VMON),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,scaffold contact pressed into the board+J1,MachineContactMedium,molecule contact (VIN),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board+J2,MachineContactMedium,molecule contact (GND),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board+J3,MachineContactMedium,molecule contact (EN),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board+J4,MachineContactMedium,molecule contact (VOUT),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board+J5,MachineContactMedium,molecule contact (GND),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board+J6,MachineContactMedium,molecule contact (VMON),MachineContactMedium,Adom,MachineContactMedium (1.3 mm pad / 0.78 mm drill),Adom stock,,,molecule contact pressed into the board MP1,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin MP2,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin MP3,MachinePinMediumShort,molecule machine pin (GND),MachinePinMediumShort,Adom,MachinePinMediumShort (1.6 mm pad / 1.2 mm drill),Adom stock,,,corner pin; MP1 is the origin
design/calcs.json+1−1
@@ -46,7 +46,7 @@   "chosen": "2 x 10 uF 1206 X7R 25 V (Mouser) + 100 nF 0603 X7R 50 V (Adom stock) at the VIN pin",   "effective_uF": 12.0,   "vin_ripple_mV": 40.5,-  "bulk": "47 uF 35 V aluminium electrolytic: damps the bench/control-panel cable inductance against the low-ESR ceramics (hot-plug ringing), datasheet 7.3"+  "bulk": "47 uF 35 V aluminium electrolytic: damps the supply cable inductance against the low-ESR ceramics (hot-plug ringing), datasheet 7.3"  },  "uvlo": {   "R_top": 1000000.0,
design/calcs.py+1−1
@@ -77,7 +77,7 @@ CIN_eff = 2 * 10e-6 * 0.6 dVin = IOUT * D * (1 - D) / (CIN_eff * FSW) out["cin"] = {"Irms_A": round(ICIN_RMS, 3), "chosen": "2 x 10 uF 1206 X7R 25 V (Mouser) + 100 nF 0603 X7R 50 V (Adom stock) at the VIN pin",               "effective_uF": CIN_eff * 1e6, "vin_ripple_mV": round(dVin * 1e3, 1),-              "bulk": "47 uF 35 V aluminium electrolytic: damps the bench/control-panel cable inductance against the low-ESR ceramics (hot-plug ringing), datasheet 7.3"}+              "bulk": "47 uF 35 V aluminium electrolytic: damps the supply cable inductance against the low-ESR ceramics (hot-plug ringing), datasheet 7.3"}  # ---- EN UVLO divider (stocked values) ---------------------------------- IP, IH, VEN_R, VEN_F = 0.7e-6, 1.55e-6, 1.21, 1.19
docs/aiflow-run.md−1
@@ -95,7 +95,6 @@ Everything in this run that aiflow did not guide, gate or measure was logged as | 8 | no schematic-to-board path or netlist equivalence check | gate | **closed in 0.1.37** | | 9 | aiflow does not know the molecule format | skill + gate | **closed in 0.1.37** | | 10 | DRC does not load the target fab's rules | gate | **closed in 0.1.37** |-| 11 | no scaffold / control-panel step after `finish` | skill | skill in 0.1.34 (`aiflow-scaffold-probe`) | | 12 | no vendor-model (PSpice) simulation step | skill + gate + hands | **closed in 0.1.37** | | 13 | vendor logins: get them from the vault, never ask the human | skill | skill in 0.1.34 (`aiflow-credentials`) | | 14 | vendor sign-ups work in the user's real browser | skill | skill in 0.1.34 (`aiflow-credentials`) |
docs/board.md+3−3
@@ -4,7 +4,7 @@  ## Molecule format -This buck is an Adom molecule: a small board that plugs into a scaffold on machine pins, so the probing workcell and the control panel can connect to it without cables.+This buck is an Adom molecule: a small board with machine pins and contacts on a fixed grid, so other hardware can connect to it without cables.  | property | value | |---|---|@@ -26,7 +26,7 @@ This buck is an Adom molecule: a small board that plugs into a scaffold on machi | J6 | (24, 4) | VMON | VOUT / 2, for a 3.3 V ADC | | MP1 to MP4 | (0, 0), (24, 0), (0, 16), (24, 16) | GND | mechanical and ground | -The scaffold and the control-panel wiring depend on these ten positions. The adom-aiflow spec lists them as fixed parts, so placement never moves them.+Everything that connects to the molecule depends on these ten positions. The adom-aiflow spec lists them as fixed parts, so placement never moves them.  ## Design rules @@ -143,7 +143,7 @@ The silkscreen follows adom-aiflow's silkscreen guidance (aiflow-silkscreen, `do  ![Bottom face, KiCad 10's own 3D render, seen from below](docs/img/silk-bottom.png) -**Importance pass first.** This board is powered, switched and probed on a scaffold, so the ranking was:+**Importance pass first.** This board is powered, switched and probed through its contacts, so the ranking was:  1. The six contacts' functions (VIN, GND, EN, VOUT, GND, VMON), on **both faces**, between each contact and the board edge, inside printed frames, with the J reference smaller. The corner pins say GND on both faces. 2. The four probe pads, each with its reference and net (TP1 SW, TP2 FB, TP3 VOUT, TP4 GND).
docs/design.md+4−4
@@ -8,7 +8,7 @@ The brief comes from the YouTube video "Hardware Design with GPT-6: Schematic, P  | requirement | brief | this design | |---|---|---|-| input | 12 V | 12 V nominal, designed for 9 V to 16 V (bench or control-panel rail, with margin) |+| input | 12 V | 12 V nominal, designed for 9 V to 16 V (bench or system rail, with margin) | | output | 5 V, 1 A | 5 V, 1 A continuous | | terminals | yes | Adom molecule contacts J1 to J6 (VIN, GND, EN, VOUT, GND, VMON) plus four GND machine pins | | test points | yes | TP1 SW, TP2 FB, TP3 VOUT, TP4 GND (1.0 mm probe pads) |@@ -25,7 +25,7 @@ The brief comes from the YouTube video "Hardware Design with GPT-6: Schematic, P | compensation | internal, peak current mode | no compensation network to tune | | soft start | internal 5 ms | no soft-start capacitor | | light load | Advanced Eco-mode pulse skip | |-| protection | cycle-by-cycle current limit on both FETs, hiccup, OVP, thermal shutdown | safe on a probing workcell |+| protection | cycle-by-cycle current limit on both FETs, hiccup, OVP, thermal shutdown | safe under bench probing | | package | SOT-23-6 (DDC), 2.9 x 2.8 mm | fits a 28 x 20 mm molecule | | listed application | "12V, 24V distributed power-bus supply" | exactly this job | @@ -126,7 +126,7 @@ The EN pin sets a start and stop threshold above the internal VIN UVLO (datashee | EN at 16 V | 2.09 V | | EN at 28 V (part maximum) | 3.65 V, under the 5.5 V EN absolute maximum | -J3 brings EN out to the molecule interface. The control panel can pull it low (open drain) to switch the rail off.+J3 brings EN out to the molecule interface. A host can pull it low (open drain) to switch the rail off.  ## Bootstrap @@ -142,7 +142,7 @@ The datasheet (6.3.10, 7.2.3.2) requires a 0.1 uF X7R or X5R ceramic between BOO | input ripple | 40.5 mV | | bulk | 47 uF 35 V aluminium electrolytic (Panasonic EEE-FK1V470P) | -Why the electrolytic: its ESR damps the inductance of the bench or control-panel cable against the low-ESR ceramics, which prevents hot-plug ringing (datasheet 7.3).+Why the electrolytic: its ESR damps the inductance of the supply cable against the low-ESR ceramics, which prevents hot-plug ringing (datasheet 7.3).  ## Losses and efficiency (estimate) 
docs/simulation.md+1−1
@@ -121,7 +121,7 @@ TI's model agrees. At the corrected 1 A load its 0.5 A steps (93 and 91 mV) scal - Only a larger Cff would help, and Cff stays at 68 pF to keep the crossover under the datasheet's 40 kHz limit. - The 3 % step target in `calcs.py` was our own, not part of the brief. 3.7 % is inside the usual +/-5 % window for a 5 V rail. -**COUT is unchanged.** The design has not been built yet. When it is, a real 0 to 1 A step on the probing workcell is the next check.+**COUT is unchanged.** The design has not been built yet. When it is, a real 0 to 1 A step on the bench is the next check.  ## Files 
docs/thermal-current.md+1−1
@@ -76,7 +76,7 @@ U1 is a SOT-23 with no exposed pad, so its heat goes out through the pins, and m  ## The approved budget: 55 C, still air, junction based -The first spec set a 30 C rise budget, to keep the junction under 85 C at a 55 C ambient inside a workcell. The Fields solve failed that budget in still air (U1 +44 C, L1 +41 C).+The first spec set a 30 C rise budget, to keep the junction under 85 C at a 55 C ambient. The Fields solve failed that budget in still air (U1 +44 C, L1 +41 C).  We then checked whether better copper could close the gap, and found the limit is the board's area, not the layout: 
page.json+2−2
@@ -2,8 +2,8 @@   "schema_version": 1,   "slug": "buck-12v5v-molecule",   "type": "component",-  "title": "12 V to 5 V / 1 A Buck Molecule (TPS54202) on a Probing Scaffold",-  "brief": "An independently designed 12 V to 5 V, 1 A synchronous buck molecule (TI TPS54202), with calculations, ngspice and PSpice simulation, KiCad 10 schematic and board, and its place on a scaffold wired to the control panel for live probing.",+  "title": "12 V to 5 V / 1 A Buck Molecule (TPS54202)",+  "brief": "An independently designed 12 V to 5 V, 1 A synchronous buck molecule (TI TPS54202), with calculations, ngspice and PSpice simulation, KiCad 10 schematic and board, and the board laid out and analysed with adom-aiflow.",   "version": "0.1.0",   "visibility": {     "public": true
sim/ti-pspice-validation.md+1−1
@@ -22,4 +22,4 @@ Files: /home/adom/spice-compare/pspice/tps54202_ti.cir, results/ti_model_metrics  TI's model confirms startup, ripple and the inductor current; it shows about 15 % more load-step deviation than the fitted ngspice loop, and VOUT at 5.008 V (closer to nominal than the fitted model's 4.979 V). -For this internally compensated part the datasheet's crossover estimate (eq 14, fo = 3.95 / (VOUT x COUT)) makes fo x COUT constant, so the load-step deviation is about dI x VOUT / (2 pi x 3.95), independent of COUT: about 0.2 V for a full 1 A step. TI's 0.5 A steps (91 / 89 mV) scale to about 180 mV (3.6 %) for 1 A. More output capacitance would lower the crossover and leave the deviation about the same; only a larger Cff would help, and Cff stays at 68 pF to keep the crossover under the datasheet's 40 kHz limit. The 3 % step budget in calcs.py was a self-set target, not part of the brief; 3.6 % is inside the usual +/-5 % for a 5 V rail. COUT is unchanged. Confirm with a real 0 to 1 A step on the probing workcell.+For this internally compensated part the datasheet's crossover estimate (eq 14, fo = 3.95 / (VOUT x COUT)) makes fo x COUT constant, so the load-step deviation is about dI x VOUT / (2 pi x 3.95), independent of COUT: about 0.2 V for a full 1 A step. TI's 0.5 A steps (91 / 89 mV) scale to about 180 mV (3.6 %) for 1 A. More output capacitance would lower the crossover and leave the deviation about the same; only a larger Cff would help, and Cff stays at 68 pF to keep the crossover under the datasheet's 40 kHz limit. The 3 % step budget in calcs.py was a self-set target, not part of the brief; 3.6 % is inside the usual +/-5 % for a 5 V rail. COUT is unchanged. Confirm with a real 0 to 1 A step on the bench.