4.5–16V
Supply Range
200 mA
Output Current
8
Pin Count
3–15 mA
Supply Current
0.005%/°C
Temp Stability
100 ns
Rise / Fall Time
Description
The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and duty cycle are accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output circuit can source or sink up to 200 mA or drive TTL circuits.
Features
- ▶ Direct replacement for SE555/NE555
- ▶ Timing from microseconds through hours
- ▶ Operates in both astable and monostable modes
- ▶ Adjustable duty cycle
- ▶ Output can source or sink 200 mA
- ▶ Output and supply TTL compatible
- ▶ Temperature stability better than 0.005% per °C
- ▶ Normally on and normally off output
- ▶ Available in 8-pin VSSOP package
Pin Configuration
1GNDGND
Ground reference voltage (0V)
2TRIGGERIN
Responsible for transition of the flip-flop from set to reset. Output depends on amplitude of external trigger pulse. Triggers on voltage falling below ⅓ VCC.
3OUTPUTOUT
Output driven waveform. Can source or sink up to 200 mA. TTL compatible.
4RESETIN
Negative pulse applied to disable or reset the timer. When not used for reset, connect to VCC to avoid false triggering. Active low, threshold 0.4–1V.
5CONTROL VOLTAGEIN
Controls the threshold and trigger levels, determining pulse width. An external voltage can modulate the output waveform. Typically bypassed with 10nF to GND.
6THRESHOLDIN
Compares applied voltage with reference of ⅔ VCC. Responsible for the set state of the internal flip-flop. Input current 0.1–0.25 μA.
7DISCHARGEIN
Open collector output which discharges timing capacitor between intervals (in phase with output). Toggles output high→low when voltage reaches ⅔ VCC.
8VCCPWR
Positive supply voltage. Operating range 4.5V to 16V. Bypass with 100nF ceramic capacitor close to pin.
Absolute Maximum Ratings
Stresses beyond these limits may cause permanent damage. These are stress ratings only and do not imply functional operation at these conditions.
| Parameter | Min | Max | Unit |
|---|---|---|---|
| Supply Voltage (VCC) | — | 18 | V |
| Power Dissipation — LM555CM/CN | — | 1180 | mW |
| Power Dissipation — LM555CMM (VSSOP) | — | 613 | mW |
| Storage Temperature | −65 | 150 | °C |
| Soldering — PDIP (10 sec) | — | 260 | °C |
| Soldering — SOIC/VSSOP Vapor Phase (60 sec) | — | 215 | °C |
| Soldering — SOIC/VSSOP Infrared (15 sec) | — | 220 | °C |
| ESD — Human Body Model (HBM) | — | ±500 | V |
Recommended Operating Conditions
| Parameter | Min | Max | Unit |
|---|---|---|---|
| Supply Voltage | 4.5 | 16 | V |
| Operating Temperature (TA) | 0 | 70 | °C |
| Operating Junction Temperature (TJ) | — | 70 | °C |
Thermal Information
| Metric | PDIP (8) | SOIC (8) | VSSOP (8) | Unit |
|---|---|---|---|---|
| RθJA (Junction-to-Ambient) | 106 | 170 | 204 | °C/W |
Electrical Characteristics
TA = 25°C, VCC = 5V to 15V, unless otherwise specified.
| Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Supply Voltage | — | 4.5 | — | 16 | V |
| Supply Current (ICC) | VCC=5V, RL=∞ | — | 3 | 6 | mA |
| Supply Current (ICC) | VCC=15V, RL=∞ | — | 10 | 15 | mA |
| Threshold Voltage | — | 0.667 × VCC | V | ||
| Trigger Voltage | VCC = 15V | 5 | V | ||
| Trigger Voltage | VCC = 5V | 1.67 | V | ||
| Trigger Current | — | — | 0.5 | 0.9 | μA |
| Reset Voltage | — | — | 0.5 | 1 | V |
| Reset Current | — | — | 0.1 | 0.4 | mA |
| Threshold Current | — | — | 0.1 | 0.25 | μA |
| Control Voltage | VCC=15V | 9 | 10 | 11 | V |
| Control Voltage | VCC=5V | 2.6 | 3.33 | 4 | V |
| Pin 7 Leakage (High) | — | — | 1 | 100 | nA |
| Pin 7 Saturation | VCC=15V, I7=15mA | — | — | 180 | mV |
| Pin 7 Saturation | VCC=4.5V, I7=4.5mA | — | 80 | 200 | mV |
| Output Low (VOL) | ISINK=10mA | — | 0.1 | 0.25 | V |
| Output Low (VOL) | ISINK=50mA | — | 0.4 | 0.75 | V |
| Output Low (VOL) | ISINK=100mA | — | 2 | 2.5 | V |
| Output High (VOH) | ISRC=100mA, VCC=15V | 12.75 | — | 13.3 | V |
| Output High (VOH) | ISRC=100mA, VCC=5V | 2.75 | — | 3.3 | V |
| Rise Time | — | 100 | ns | ||
| Fall Time | — | 100 | ns | ||
Timing Accuracy
| Parameter | Mode | Value | Unit |
|---|---|---|---|
| Initial Accuracy | Monostable | 1% | — |
| Drift with Temperature | Monostable | 50 | ppm/°C |
| Accuracy over Temperature | Monostable | 1.5% | — |
| Drift with Supply | Monostable | 0.1% | /V |
| Initial Accuracy | Astable | 2.25% | — |
| Drift with Temperature | Astable | 150 | ppm/°C |
| Accuracy over Temperature | Astable | 3% | — |
| Drift with Supply | Astable | 0.30% | /V |
Diagrams & Graphs (20 figures)
All figures extracted from TI LM555 datasheet (SNAS548D). Click any diagram to expand full-width.
Circuit Diagrams (4)
Internal Schematic Diagram
Complete transistor-level schematic: 28 transistors, 12 resistors. Shows comparators, SR flip-flop, output stage, and discharge transistor.
Monostable (One-Shot) Circuit
Typical monostable configuration with normally-on and normally-off load connections. R_A and C set the time delay: t = 1.1 × R_A × C.
Astable (Oscillator) Circuit
Astable configuration with R_A, R_B, and C. Free-running frequency: f = 1.44 / ((R_A + 2R_B) × C). Duty cycle set by R_A/R_B ratio.
Monostable Application Example
Practical monostable circuit with pushbutton trigger, LED output indicator, 10K pull-ups, and 470μF timing capacitor.
Electrical Characteristics (10)
Supply Current vs Supply Voltage
I_CC vs V_CC (5–15V) at −55°C, +25°C, and +125°C. Linear relationship, 2.5–10mA typical range.
Output High Voltage Drop vs Source Current
V_CC − V_OUT vs I_SOURCE at three temperatures. Shows output high-side drop increases with current and decreases with temperature.
Output Low Voltage vs Sink Current (V_CC=5V)
V_OUT vs I_SINK at V_CC=5V. Log-log scale. Linear relationship up to ~50mA across temperature.
Output Low Voltage vs Sink Current (V_CC=10V)
V_OUT vs I_SINK at V_CC=10V across temperature range. Similar behavior to 5V with tighter spread.
Output Low Voltage vs Sink Current (V_CC=15V)
V_OUT vs I_SINK at V_CC=15V across temperature range.
Minimum Trigger Pulse Width
Minimum pulse width (μs) vs trigger voltage (×V_CC) at V_CC=15V. Higher temperatures require wider trigger pulses.
Discharge Pin V_SAT (V_CC=15V)
Pin 7 saturation voltage vs sink current at V_CC=15V across temperature. Critical for timing accuracy calculations.
Discharge Pin V_SAT (V_CC=5V)
Pin 7 saturation voltage vs sink current at V_CC=5V across temperature.
Propagation Delay vs Trigger Level (multi-V_CC)
Propagation delay (ns) vs trigger voltage at T=25°C for V_CC=5V, 10V, 15V. ~200ns baseline, rising sharply above 0.2×V_CC.
Propagation Delay vs Trigger Level (multi-temp)
Propagation delay (ns) vs trigger voltage at V_CC=15V across −55°C to +125°C. Five temperature curves.
Waveforms (4)
Astable Mode Waveforms
Oscilloscope capture: output square wave (top), trigger/threshold crossing (middle), capacitor charge/discharge sawtooth (bottom).
Astable Output + Capacitor Waveforms
Output square wave (top) and capacitor voltage sawtooth (bottom) in astable mode. Shows charge through R_A+R_B, discharge through R_B.
Monostable Mode Waveforms
Monostable waveforms: output pulse (top), reset/trigger (middle), capacitor exponential charge (bottom). Shows re-trigger behavior.
Real Oscilloscope Capture (Color)
Modern color oscilloscope capture showing 3-channel monostable timing: trigger input (blue), output pulse (magenta), capacitor voltage (green). ΔX=5.18s, 193mHz.
Design Charts (2)
Monostable Time Delay Design Chart
Capacitance vs time delay for R values 1kΩ–10MΩ. Use to select R and C for desired monostable pulse width (10μs–100s).
Astable Frequency Design Chart
Capacitance vs free-running frequency for (R_A+2R_B) values 1kΩ–10MΩ. Use to select R and C for desired oscillation (0.1Hz–100kHz).
Available Packages
SOIC-8
4.90 × 3.91 mm
RθJA = 170 °C/W
PDIP-8
9.81 × 6.35 mm
RθJA = 106 °C/W
VSSOP-8
3.00 × 3.00 mm
RθJA = 204 °C/W
Ordering Information
| Part Number | Package | Notes |
|---|---|---|
| LM555CM | SOIC-8 | Surface mount, tape & reel |
| LM555CN | PDIP-8 | Through-hole, tube |
| LM555CMM | VSSOP-8 | Fine-pitch surface mount |
Applications
- ▶ Precision Timing
- ▶ Pulse Generation
- ▶ Sequential Timing
- ▶ Time Delay Generation
- ▶ Pulse Width Modulation (PWM)
- ▶ Pulse Position Modulation
- ▶ Linear Ramp Generator
Key Formulas
Monostable (One-Shot) — Time Delay
t = 1.1 × RA × C
Astable — Frequency
f = 1.44 / ((RA + 2·RB) × C)
Astable — Duty Cycle
D = (RA + RB) / (RA + 2·RB)
Conditions: RA = 1kΩ to 100kΩ, C = 0.1μF. Maximum total RA + RB = 20MΩ for 15V operation. Control voltage (pin 5) determines internal comparator thresholds at ⅓VCC and ⅔VCC.