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 <rulecategory type="Matched Lengths" manualdrc="yes" livedrc="yes"/>
 <rulecategory type="Via Restrict Clearance" manualdrc="yes" livedrc="yes"/>
 <rulecategory type="Teardrop" manualdrc="no" livedrc="no"/>
 <rule type="Minimum Copper Width" enabled="yes" priority="0" onescope="classes=1" value="0.09mm" preferredvalue="0.3mm" check_polywidth="no" name="Trace size for Power"/>
 <rule type="Minimum Copper Width" builtin_ruleid="14" enabled="yes" priority="1" value="0.09mm" preferredvalue="0.2mm" check_polywidth="no" name="minimum-copper-width-1"/>
 <rule type="Teardrop" builtin_ruleid="22" enabled="yes" priority="0" onescope="is_via" lengthratio="0.5" widthratio="0.7" curved_sides="no" auto_generate="no" name="teardrop-1"/>
 <rule type="Teardrop" builtin_ruleid="23" enabled="yes" priority="1" onescope="is_pad" lengthratio="0.5" widthratio="0.7" curved_sides="no" auto_generate="no" name="teardrop-2"/>
 <rule type="Teardrop" builtin_ruleid="24" enabled="yes" priority="2" onescope="is_smd" lengthratio="0.5" widthratio="0.7" curved_sides="no" auto_generate="no" name="teardrop-3"/>
 <rule type="Teardrop" builtin_ruleid="25" enabled="yes" priority="3" onescope="is_wire_polygon" lengthratio="0.5" widthratio="0.9" curved_sides="no" auto_generate="no" name="teardrop-4"/>
 <rule type="Minimum Drill Size" enabled="yes" priority="0" onescope="is_via" value="0.15mm" preferredvalue="0.2mm" name="Min Via hole size on 4-layer"/>
 <rule type="Minimum Drill Size" enabled="no" priority="1" onescope="all" value="0.5mm" preferredvalue="0.5mm" name="Min Non-plated holes"/>
 <rule type="Minimum Drill Size" builtin_ruleid="15" enabled="yes" priority="2" value="0.15mm" preferredvalue="0.25mm" name="minimum-drill-size-1"/>
 <rule type="Acute Angle" builtin_ruleid="16" enabled="no" priority="0" name="acute-angle-1"/>
 <rule type="Wire Stub" builtin_ruleid="17" enabled="yes" priority="0" name="wire-stub-1"/>
 <rule type="Air-Wire" builtin_ruleid="19" enabled="yes" priority="0" name="air-wire-1"/>
 <rule type="Matched Lengths" builtin_ruleid="20" enabled="yes" priority="0" tolerance="10mm" gapfactor="2.5" name="matched-lengths-1"/>
 <rule type="Copper Clearance" enabled="yes" priority="0" onescope="all" otherscope="all" value="0.25mm" preferredvalue="0.25mm" samesignal="yes" bothscope="all" name="Same-net track spacing"/>
 <rule type="Copper Clearance" builtin_ruleid="0" enabled="yes" priority="1" onescope="is_wire_polygon" otherscope="is_wire_polygon" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-1"/>
 <rule type="Copper Clearance" builtin_ruleid="1" enabled="yes" priority="2" onescope="is_wire_polygon" otherscope="is_pad_smd" value="0.0005mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-2"/>
 <rule type="Copper Clearance" builtin_ruleid="2" enabled="yes" priority="3" onescope="is_wire_polygon" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-3"/>
 <rule type="Copper Clearance" builtin_ruleid="3" enabled="yes" priority="4" onescope="is_pad_smd" otherscope="is_pad_smd" value="0.1mm" preferredvalue="0.15mm" samesignal="no" name="copper-clearance-4"/>
 <rule type="Copper Clearance" builtin_ruleid="4" enabled="yes" priority="5" onescope="is_pad_smd" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-5"/>
 <rule type="Copper Clearance" builtin_ruleid="5" enabled="yes" priority="6" onescope="is_via" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="no" name="copper-clearance-6"/>
 <rule type="Copper Clearance" builtin_ruleid="6" enabled="yes" priority="7" onescope="is_smd" otherscope="is_pad" value="0.1mm" preferredvalue="0.2mm" samesignal="yes" name="copper-clearance-7"/>
 <rule type="Copper Clearance" builtin_ruleid="7" enabled="yes" priority="8" onescope="is_smd" otherscope="is_via" value="0.1mm" preferredvalue="0.2mm" samesignal="yes" name="copper-clearance-8"/>
 <rule type="Copper Clearance" builtin_ruleid="8" enabled="yes" priority="9" onescope="is_smd" otherscope="is_smd" value="0.1mm" preferredvalue="0.2mm" samesignal="yes" name="copper-clearance-9"/>
 <rule type="Dimension Clearance" builtin_ruleid="9" enabled="yes" priority="0" value="0.2mm" preferredvalue="0.2mm" name="dimension-clearance-1"/>
 <rule type="Via Restrict Clearance" builtin_ruleid="21" enabled="yes" priority="0" value="0mil" preferredvalue="0mil" name="via-restrict-clearance-1"/>
 <rule type="Restrict Clearance" builtin_ruleid="10" enabled="yes" priority="0" value="0mil" preferredvalue="0mil" name="restrict-clearance-1"/>
 <rule type="Small Gap" builtin_ruleid="18" enabled="yes" priority="0" name="small-gap-1"/>
 <rule type="Solder-Mask Clearance" builtin_ruleid="11" enabled="no" priority="0" value="0mil" preferredvalue="0mil" check_name="yes" check_value="no" name="solder-mask-clearance-1"/>
 <rule type="Drill Distance" builtin_ruleid="12" enabled="yes" priority="0" value="0.2mm" preferredvalue="0.2mm" name="drill-distance-1"/>
 <rule type="Keepout Clearance" builtin_ruleid="13" enabled="yes" priority="0" value="0mil" preferredvalue="0mil" name="keepout-clearance-1"/>
 </rules>
<param name="mdWireWire" value="0.1mm"/>
<param name="mdWirePad" value="0.0005mm"/>
<param name="mdWireVia" value="0.1mm"/>
<param name="mdPadPad" value="0.1mm"/>
<param name="mdPadVia" value="0.1mm"/>
<param name="mdViaVia" value="0.1mm"/>
<param name="mdSmdPad" value="0.1mm"/>
<param name="mdSmdVia" value="0.1mm"/>
<param name="mdSmdSmd" value="0.1mm"/>
<param name="mdCopperDimension" value="0.2mm"/>
<param name="mdDrill" value="0.2mm"/>
<param name="msWidth" value="0.09mm"/>
<param name="msDrill" value="0.15mm"/>
<param name="dpMaxLengthDifference" value="10mm"/>
<param name="dpGapFactor" value="2.5"/>
<description language="en">Adom Defaults for JLCPCB design rules (4 layers)

Board thickness: 1.6mm
Copper weight: 1oz (35um)

Track width spacing for 4-layer:
Multilayer: 0.09 / 0.09 mm (3.5 / 3.5 mil). 3 mil is acceptable in BGA fan-outs.
BGA pad diameter ≥ 0.25 mm
BGA pad to trace clearance min. 0.09 mm for multilayer boards
Vias can be placed within BGA pads using filled and plated-over vias

There are 2 net classes of:
These are valuable when using the auto-router if you tell it what wires are in the Power class
- Default (Min 0.09mm track width, Preferred 0.2mm)
- Power (Min 0.09mm track width, Preferred 0.3mm)
Min. track width and spacing (1 oz)
0.10 / 0.10 mm (4 / 4 mil)

Vias:
- Min 0.15mm via allowed on 4-layer now with JLC
- We made preferred 0.25mm, although JLC says 0.2 is preferred
Min. Via hole size/diameter 4-layer: 0.15mm hole size / 0.25mm via diameter

Drill:
Drill Diameter - 4-layer: 0.15 – 6.3 mm
Min. Non-plated holes - 0.50mm
Holes with diameter ≥ 6.3 mm are CNC routed from a smaller drilled hole.

Annular Ring:
Vias: 0.1mm annular ring is JLC min
Pads (through-hole parts): 0.18mm annular ring is JLC min
However, they prefer 0.25mm annular ring or above

</description>
<param name="layerSetup" value="(1+2*15+16)"/>
<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
<param name="mtIsolate" value="1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
<param name="mdViaViaSameLayer" value="6mil"/>
<param name="mnLayersViaInSmd" value="2"/>
<param name="mdSmdStop" value="0mil"/>
<param name="msMicroVia" value="0.3mm"/>
<param name="msBlindViaRatio" value="0.5"/>
<param name="rvPadTop" value="0"/>
<param name="rvPadInner" value="0"/>
<param name="rvPadBottom" value="0"/>
<param name="rvViaOuter" value="0"/>
<param name="rvViaInner" value="0"/>
<param name="rvMicroViaOuter" value="0"/>
<param name="rvMicroViaInner" value="0"/>
<param name="rlMinPadTop" value="0.18mm"/>
<param name="rlMaxPadTop" value="80mil"/>
<param name="rlMinPadInner" value="0.18mm"/>
<param name="rlMaxPadInner" value="20mil"/>
<param name="rlMinPadBottom" value="0.18mm"/>
<param name="rlMaxPadBottom" value="80mil"/>
<param name="rlMinViaOuter" value="0.1mm"/>
<param name="rlMaxViaOuter" value="20mil"/>
<param name="rlMinViaInner" value="0.1mm"/>
<param name="rlMaxViaInner" value="20mil"/>
<param name="rlMinMicroViaOuter" value="0.1mm"/>
<param name="rlMaxMicroViaOuter" value="20mil"/>
<param name="rlMinMicroViaInner" value="0.1mm"/>
<param name="rlMaxMicroViaInner" value="20mil"/>
<param name="psTop" value="-1"/>
<param name="psBottom" value="-1"/>
<param name="psFirst" value="-1"/>
<param name="psElongationLong" value="100"/>
<param name="psElongationOffset" value="100"/>
<param name="mvStopFrame" value="0"/>
<param name="mvCreamFrame" value="0"/>
<param name="mlMinStopFrame" value="0.038mm"/>
<param name="mlMaxStopFrame" value="4mil"/>
<param name="mlMinCreamFrame" value="0mil"/>
<param name="mlMaxCreamFrame" value="0mil"/>
<param name="mlViaStopLimit" value="0.5mm"/>
<param name="srRoundness" value="0"/>
<param name="srMinRoundness" value="0mil"/>
<param name="srMaxRoundness" value="0mil"/>
<param name="slThermalIsolate" value="10mil"/>
<param name="slThermalsForVias" value="0"/>
<param name="checkAngle" value="0"/>
<param name="checkRestrict" value="1"/>
<param name="checkStop" value="0"/>
<param name="checkValues" value="0"/>
<param name="checkNames" value="1"/>
<param name="checkWireStubs" value="1"/>
<param name="checkPolygonWidth" value="0"/>
<param name="useDiameter" value="13"/>
<param name="removeAnnularRing" value="0"/>
<param name="flattenRefDes" value="0"/>
<param name="maxErrors" value="50"/>
<layerstackup name="Default Layer Stack" type="Standard Stackup" display_unit="mic" roughness_model="0">
 <layerdef type="Signal" id="{aacc8861-39b2-48dc-8db3-f266478ef2b8}" layer="1" name="Top" locally_modified_material="yes">
 <material name="User Defined" thickness="0.035mm" weight="1oz" process="Electro Deposited" source="User"/>
</layerdef>
 <layerdef type="Prepreg" id="{adcb8555-47a8-402a-8dc6-0ded7ce8d84c}" layer="2" name="Dielectric-2" locally_modified_material="yes">
 <material name="User Defined" glass_style="" thickness="0.2mm" resin="50%" dielectric_constant_1g="4.5" dissipation_factor_1g="0.02" glass_transition_temperature="125degC" source="User"/>
</layerdef>
 <layerdef type="Signal" id="{5ffaa838-d681-4063-bb48-2b039e6cf0b6}" layer="2" name="Route2" locally_modified_material="yes">
 <material name="User Defined" thickness="0.0175mm" weight="1oz" process="Electro Deposited" source="User"/>
</layerdef>
 <layerdef type="Core" id="{80a6f05f-0ad2-4112-8467-cea4561d9bb9}" layer="1" name="Dielectric-1" locally_modified_material="yes">
 <material name="User Defined" construction="" thickness="1.065mm" resin="50%" dielectric_constant_1g="4.5" dissipation_factor_1g="0.02" glass_transition_temperature="125degC" source="User"/>
</layerdef>
 <layerdef type="Signal" id="{37bd35fe-018e-4cdb-8b86-5ed09ec84a8a}" layer="15" name="Route15" locally_modified_material="yes">
 <material name="User Defined" thickness="0.0175mm" weight="1oz" process="Electro Deposited" source="User"/>
</layerdef>
 <layerdef type="Prepreg" id="{61cdb834-2e83-4ba7-98a3-15b69ca17485}" layer="3" name="Dielectric-3" locally_modified_material="yes">
 <material name="User Defined" glass_style="" thickness="0.2mm" resin="50%" dielectric_constant_1g="4.5" dissipation_factor_1g="0.02" glass_transition_temperature="125degC" source="User"/>
</layerdef>
 <layerdef type="Signal" id="{633df6dd-d049-4e1e-91be-c70449465674}" layer="16" name="Bottom" locally_modified_material="yes">
 <material name="User Defined" thickness="0.035mm" weight="1oz" process="Electro Deposited" source="User"/>
</layerdef>
 <viadef name="Thru 1:16" startlayer="1" stoplayer="16" complement="no"/>
 </layerstackup>
 </designrules>
<autorouter>
<pass name="Default">
<param name="RoutingGrid" value="50mil"/>
<param name="AutoGrid" value="1"/>
<param name="Efforts" value="0"/>
<param name="TopRouterVariant" value="1"/>
<param name="tpViaShape" value="round"/>
<param name="PrefDir.1" value="a"/>
<param name="PrefDir.2" value="0"/>
<param name="PrefDir.3" value="0"/>
<param name="PrefDir.4" value="0"/>
<param name="PrefDir.5" value="0"/>
<param name="PrefDir.6" value="0"/>
<param name="PrefDir.7" value="0"/>
<param name="PrefDir.8" value="0"/>
<param name="PrefDir.9" value="0"/>
<param name="PrefDir.10" value="0"/>
<param name="PrefDir.11" value="0"/>
<param name="PrefDir.12" value="0"/>
<param name="PrefDir.13" value="0"/>
<param name="PrefDir.14" value="0"/>
<param name="PrefDir.15" value="0"/>
<param name="PrefDir.16" value="a"/>
<param name="cfVia" value="8"/>
<param name="cfNonPref" value="5"/>
<param name="cfChangeDir" value="2"/>
<param name="cfOrthStep" value="2"/>
<param name="cfDiagStep" value="3"/>
<param name="cfExtdStep" value="0"/>
<param name="cfBonusStep" value="1"/>
<param name="cfMalusStep" value="1"/>
<param name="cfPadImpact" value="4"/>
<param name="cfSmdImpact" value="4"/>
<param name="cfBusImpact" value="0"/>
<param name="cfHugging" value="3"/>
<param name="cfAvoid" value="4"/>
<param name="cfPolygon" value="10"/>
<param name="cfBase.1" value="0"/>
<param name="cfBase.2" value="1"/>
<param name="cfBase.3" value="1"/>
<param name="cfBase.4" value="1"/>
<param name="cfBase.5" value="1"/>
<param name="cfBase.6" value="1"/>
<param name="cfBase.7" value="1"/>
<param name="cfBase.8" value="1"/>
<param name="cfBase.9" value="1"/>
<param name="cfBase.10" value="1"/>
<param name="cfBase.11" value="1"/>
<param name="cfBase.12" value="1"/>
<param name="cfBase.13" value="1"/>
<param name="cfBase.14" value="1"/>
<param name="cfBase.15" value="1"/>
<param name="cfBase.16" value="0"/>
<param name="mnVias" value="20"/>
<param name="mnSegments" value="9999"/>
<param name="mnExtdSteps" value="9999"/>
<param name="mnRipupLevel" value="10"/>
<param name="mnRipupSteps" value="100"/>
<param name="mnRipupTotal" value="100"/>
</pass>
<pass name="Follow-me" refer="Default" active="yes">
</pass>
<pass name="Busses" refer="Default" active="yes">
<param name="cfNonPref" value="4"/>
<param name="cfBusImpact" value="4"/>
<param name="cfHugging" value="0"/>
<param name="mnVias" value="0"/>
</pass>
<pass name="Route" refer="Default" active="yes">
</pass>
<pass name="Optimize1" refer="Default" active="yes">
<param name="cfVia" value="99"/>
<param name="cfExtdStep" value="10"/>
<param name="cfHugging" value="1"/>
<param name="mnExtdSteps" value="1"/>
<param name="mnRipupLevel" value="0"/>
</pass>
<pass name="Optimize2" refer="Optimize1" active="yes">
<param name="cfNonPref" value="0"/>
<param name="cfChangeDir" value="6"/>
<param name="cfExtdStep" value="0"/>
<param name="cfBonusStep" value="2"/>
<param name="cfMalusStep" value="2"/>
<param name="cfPadImpact" value="2"/>
<param name="cfSmdImpact" value="2"/>
<param name="cfHugging" value="0"/>
</pass>
<pass name="Optimize3" refer="Optimize2" active="yes">
<param name="cfChangeDir" value="8"/>
<param name="cfPadImpact" value="0"/>
<param name="cfSmdImpact" value="0"/>
</pass>
<pass name="Optimize4" refer="Optimize3" active="yes">
<param name="cfChangeDir" value="25"/>
</pass>
</autorouter>
<elements>
<element name="C1" library="Adom JLCPCB Basic Parts Generated - Mar22_2025" library_urn="urn:adsk.wipprod:fs.file:vf.7FcLtn7wThSGUXpfNRsNhw" package="CAPC1005X60" package3d_urn="urn:adsk.wipprod:fs.file:vf.6QttsTQPS2SNIOVXGl831Q?version=4" value="100nF 16V X7R ~ 0402 C1525" x="9.2" y="2.7" smashed="yes">
<attribute name="CATEGORY" value="Capacitors" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="DATASHEET" value="https://www.lcsc.com/datasheet/lcsc_datasheet_2304140030_Samsung-Electro-Mechanics-CL05B104KO5NNNC_C1525.pdf" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="DESC" value="100nF 16V X7R ~10%" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="FULL_DESC" value="16V 100nF X7R ±10%" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="JLC_ROT" value="0" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="LCSC" value="C1525" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="MANUFACTURER" value="Samsung Electro-Mechanics" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="MPN" value="CL05B104KO5NNNC" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="NAME" x="9.2" y="2.7" size="0.7" layer="26" rot="MR0" align="center"/>
<attribute name="PACKAGE" value="0402" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="SOLDER_JOINTS" value="2" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
<attribute name="SUBCATEGORY" value="Multilayer Ceramic Capacitors MLCC - SMD/SMT" x="35.2" y="-15.3" size="1.778" layer="27" display="off"/>
</element>
<element name="C2" library="Adom JLCPCB Basic Parts Generated - Mar22_2025" library_urn="urn:adsk.wipprod:fs.file:vf.7FcLtn7wThSGUXpfNRsNhw" package="CAPC1005X60" package3d_urn="urn:adsk.wipprod:fs.file:vf.6QttsTQPS2SNIOVXGl831Q?version=4" value="100nF 16V X7R ~ 0402 C1525" x="7" y="1.6" smashed="yes">
<attribute name="CATEGORY" value="Capacitors" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="DATASHEET" value="https://www.lcsc.com/datasheet/lcsc_datasheet_2304140030_Samsung-Electro-Mechanics-CL05B104KO5NNNC_C1525.pdf" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="DESC" value="100nF 16V X7R ~10%" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="FULL_DESC" value="16V 100nF X7R ±10%" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="JLC_ROT" value="0" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="LCSC" value="C1525" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="MANUFACTURER" value="Samsung Electro-Mechanics" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="MPN" value="CL05B104KO5NNNC" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="NAME" x="7" y="1.6" size="0.7" layer="26" rot="MR180" align="center"/>
<attribute name="PACKAGE" value="0402" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="SOLDER_JOINTS" value="2" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
<attribute name="SUBCATEGORY" value="Multilayer Ceramic Capacitors MLCC - SMD/SMT" x="33" y="-23.4" size="1.778" layer="27" display="off"/>
</element>
<element name="C3" library="Adom JLCPCB Basic Parts Generated - Mar22_2025" library_urn="urn:adsk.wipprod:fs.file:vf.7FcLtn7wThSGUXpfNRsNhw" package="CAPC1608X85" package3d_urn="urn:adsk.wipprod:fs.file:vf.vrUgWQF_QwOGo68ntaxgUA?version=2" value="220nF 25V X7R ~ 0603 C21120" x="8.5" y="4.6" smashed="yes" rot="R90">
<attribute name="CATEGORY" value="Capacitors" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="DATASHEET" value="https://www.lcsc.com/datasheet/lcsc_datasheet_2304140030_Samsung-Electro-Mechanics-CL10B224KA8NNNC_C21120.pdf" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="DESC" value="220nF 25V X7R ~10%" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="FULL_DESC" value="25V 220nF X7R ±10%" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="JLC_ROT" value="0" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="LCSC" value="C21120" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="MANUFACTURER" value="Samsung Electro-Mechanics" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="MPN" value="CL10B224KA8NNNC" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="NAME" x="8.5" y="4.6" size="0.7" layer="26" rot="MR90" align="center"/>
<attribute name="PACKAGE" value="0603" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="SOLDER_JOINTS" value="2" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
<attribute name="SUBCATEGORY" value="Multilayer Ceramic Capacitors MLCC - SMD/SMT" x="19.5" y="31.6" size="1.778" layer="27" rot="R90" display="off"/>
</element>
<element name="D1" library="Adom JLCPCB Manually Created Library" library_urn="urn:adsk.wipprod:fs.file:vf.4qYOXVoHTHmE-J_cv3cLgA" package="LED_KT-0603-RED" package3d_urn="urn:adsk.wipprod:fs.file:vf.MJYlgTgARZmX4YMRNjN5Qg?version=4" value="Red" x="2.8" y="3.6" smashed="yes" rot="R270">
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<signal name="RESETN">
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<contactref element="RSTN" pad="P$1"/>
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<signal name="JTAG_CLK/M3SCL">
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<contactref element="JCLK" pad="P$1"/>
<contactref element="R3" pad="2"/>
<wire x1="5.6925" y1="0" x2="4.7925" y2="0.9" width="0.2" layer="1"/>
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<wire x1="4.7925" y1="1.6" x2="5.6" y2="3.8" width="0" layer="19" extent="1-1"/>
</signal>
<signal name="JTAG_DIO">
<contactref element="JDIO" pad="P$1"/>
<contactref element="U1" pad="16"/>
<wire x1="6" y1="3.8" x2="8" y2="0" width="0" layer="19" extent="1-1"/>
</signal>
<signal name="HIRQ">
<contactref element="U1" pad="4"/>
<contactref element="HIRQ" pad="P$1"/>
<wire x1="4" y1="0" x2="4" y2="2.4" width="0.2" layer="1"/>
<wire x1="4" y1="2.4" x2="5" y2="3.4" width="0.2" layer="1"/>
</signal>
<signal name="HSDO">
<contactref element="HSDO" pad="P$1"/>
<contactref element="U1" pad="1"/>
<wire x1="5" y1="4.6" x2="3.6" y2="6" width="0.2" layer="1"/>
<wire x1="3.6" y1="6" x2="0" y2="6" width="0.2" layer="1"/>
</signal>
<signal name="HSDX">
<contactref element="U1" pad="14"/>
<contactref element="HSDX" pad="P$1"/>
<wire x1="5.6" y1="4.8" x2="4" y2="6.4" width="0.2" layer="1"/>
<wire x1="4" y1="6.4" x2="4" y2="8" width="0.2" layer="1"/>
</signal>
<signal name="HSCX">
<contactref element="HSCX" pad="P$1"/>
<contactref element="U1" pad="13"/>
<wire x1="6" y1="4.8" x2="6" y2="8" width="0.2" layer="1"/>
</signal>
<signal name="HCSB">
<contactref element="U1" pad="12"/>
<contactref element="HCSB" pad="P$1"/>
<wire x1="6.4" y1="4.8" x2="6.4" y2="6.8" width="0.2" layer="1"/>
<wire x1="6.4" y1="6.8" x2="7.6" y2="8" width="0.2" layer="1"/>
<wire x1="7.6" y1="8" x2="8" y2="8" width="0.2" layer="1"/>
</signal>
<signal name="OCSB">
<contactref element="U1" pad="10"/>
<contactref element="OCSB" pad="P$1"/>
<wire x1="7" y1="4.2" x2="7.4" y2="4.2" width="0.2" layer="1"/>
<wire x1="7.4" y1="4.2" x2="7.8" y2="4.6" width="0.2" layer="1"/>
<wire x1="7.8" y1="4.6" x2="11.4" y2="4.6" width="0.2" layer="1"/>
<wire x1="11.4" y1="4.6" x2="12" y2="4" width="0.2" layer="1"/>
</signal>
<signal name="OSDO">
<contactref element="U1" pad="11"/>
<contactref element="D1" pad="A"/>
<wire x1="2.8" y1="2.85" x2="7" y2="4.6" width="0" layer="19" extent="1-1"/>
</signal>
<signal name="ASCX">
<contactref element="U1" pad="3"/>
<contactref element="ASCX" pad="P$1"/>
<wire x1="5" y1="3.8" x2="1.8" y2="3.8" width="0.2" layer="1"/>
<wire x1="1.8" y1="3.8" x2="0" y2="2" width="0.2" layer="1"/>
</signal>
<signal name="ASDX">
<contactref element="ASDX" pad="P$1"/>
<contactref element="U1" pad="2"/>
<wire x1="5" y1="4.2" x2="4.5" y2="4.2" width="0.2" layer="1"/>
<wire x1="4.5" y1="4.2" x2="4.4" y2="4.3" width="0.2" layer="1"/>
<wire x1="4.4" y1="4.3" x2="4.4" y2="4.7" width="0.2" layer="1"/>
<wire x1="4.4" y1="4.7" x2="3.5" y2="5.6" width="0.2" layer="1"/>
<wire x1="3.5" y1="5.6" x2="1.6" y2="5.6" width="0.2" layer="1"/>
<wire x1="1.6" y1="5.6" x2="0" y2="4" width="0.2" layer="1"/>
</signal>
<signal name="GND">
<contactref element="U1" pad="7"/>
<contactref element="U1" pad="6"/>
<contactref element="R1" pad="1"/>
<contactref element="C1" pad="2"/>
<contactref element="C2" pad="2"/>
<contactref element="C3" pad="2"/>
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<vertex x="8.6654875" y="0.444671875"/>
<vertex x="8.785" y="0.156146875"/>
<vertex x="8.785" y="-0.156146875"/>
<vertex x="8.6654875" y="-0.444671875"/>
<vertex x="8.444671875" y="-0.6654875"/>
<vertex x="8.156146875" y="-0.785"/>
<vertex x="7.843853125" y="-0.785"/>
</polygonholesegments>
<polygonholesegments>
<vertex x="5.843853125" y="-0.785"/>
<vertex x="5.555328125" y="-0.6654875"/>
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<vertex x="6.785" y="-0.156146875"/>
<vertex x="6.6654875" y="-0.444671875"/>
<vertex x="6.444671875" y="-0.6654875"/>
<vertex x="6.156146875" y="-0.785"/>
<vertex x="5.843853125" y="-0.785"/>
</polygonholesegments>
<polygonholesegments>
<vertex x="3.843853125" y="-0.785"/>
<vertex x="3.555328125" y="-0.6654875"/>
<vertex x="3.3345125" y="-0.444671875"/>
<vertex x="3.215" y="-0.156146875"/>
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<vertex x="4.444671875" y="-0.6654875"/>
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<vertex x="3.843853125" y="-0.785"/>
</polygonholesegments>
</polygonholelist>
</polygonshape>
</polygonfilldetails>
</polygonpour>
<via x="7.82843125" y="2.7" extent="1-16" drill="0.35" solderMask="auto">
</via>
<wire x1="7" y1="3.4" x2="7.12843125" y2="3.4" width="0.2" layer="1"/>
<wire x1="7.12843125" y1="3.4" x2="7.82843125" y2="2.7" width="0.2" layer="1"/>
<wire x1="7.82843125" y1="2.7" x2="8.7154" y2="2.7" width="0.2" layer="1"/>
</signal>
<signal name="M3SDA">
<contactref element="R2" pad="2"/>
<contactref element="MSDA" pad="P$1"/>
<contactref element="U1" pad="18"/>
<wire x1="10.3" y1="6.8925" x2="11.1075" y2="6.8925" width="0.2" layer="1"/>
<wire x1="11.1075" y1="6.8925" x2="12" y2="6" width="0.2" layer="1"/>
<wire x1="6.4" y1="4.2" x2="10.3" y2="6.8925" width="0" layer="19" extent="1-1"/>
</signal>
</signals>
<mfgpreviewcolors>
<mfgpreviewcolor name="soldermaskcolor" color="0xC8008000"/>
<mfgpreviewcolor name="silkscreencolor" color="0xFFFEFEFE"/>
<mfgpreviewcolor name="backgroundcolor" color="0xFF282828"/>
<mfgpreviewcolor name="coppercolor" color="0xFFFFBF00"/>
<mfgpreviewcolor name="substratecolor" color="0xFF786E46"/>
</mfgpreviewcolors>
</board>
</drawing>
<compatibility>
<note version="8.2" severity="warning">
Since Version 8.2, EAGLE supports online libraries. The ids
of those online libraries will not be understood (or retained)
with this version.
</note>
<note version="8.3" severity="warning">
Since Version 8.3, EAGLE supports URNs for individual library
assets (packages, symbols, and devices). The URNs of those assets
will not be understood (or retained) with this version.
</note>
<note version="8.3" severity="warning">
Since Version 8.3, EAGLE supports the association of 3D packages
with devices in libraries, schematics, and board files. Those 3D
packages will not be understood (or retained) with this version.
</note>
<note version="9.7" severity="warning">
Since Fusion, design files support named views saved in design. 
Named views found in the design will not be understood with this version. 
</note>
<note version="9.7" minversion="9.7.0" severity="warning">
Since Version 9.7.0 new layer stackup definition has been added,
which will not be loaded with this version.
</note>
<note version="9.7" minversion="9.7.0" severity="warning">
Since Version 9.7.0 new active CAMJOB file name has been added,
which will not be loaded with this version.
</note>
<note version="9.7" minversion="9.7.0" severity="warning">
Since Version 9.7.0 board construction lines has been added,
which will not be loaded with this version.
</note>
<note version="9.7" minversion="9.7.0" severity="warning">
Since Version 9.7.0 new design rule definitions have been added,
which will not be loaded with this version.
</note>
</compatibility>
</eagle>
