{
  "schema_version": 1,
  "type": "component",
  "slug": "rp2040-pican-castellated-v1",
  "title": "RP2040 PICAN Castellated Molecule v1",
  "brief": "Castellated RP2040 molecule with integrated MCP251863 CAN FD controller/transceiver — 19×35 mm, 4 corner machine pins, 49 castellated machine contacts. USB-C, 16 MB QSPI flash, SWD debug, and 120 Ω CA",
  "version": "1.0.0",
  "tags": [],
  "license": "MIT",
  "discovery_triggers": [
    "rp2040 can",
    "pican",
    "can fd molecule",
    "rp2040 castellated",
    "mcp251863",
    "can bus molecule",
    "rp2040 can transceiver",
    "castellated rp2040"
  ],
  "discovery_pitch": "RP2040 PICAN castellated molecule — dual-core MCU with integrated MCP251863 CAN FD controller/transceiver, USB-C, 16 MB flash, 53 castellated pads, SWD debug.",
  "sample_prompts": [
    {
      "label": "RP2040 CAN",
      "prompt": "Find the RP2040 CAN bus molecule"
    },
    {
      "label": "PICAN pinout",
      "prompt": "Show the pin mapping for the RP2040 PICAN molecule"
    },
    {
      "label": "CAN molecule",
      "prompt": "I need a CAN FD molecule for my workcell"
    },
    {
      "label": "RP2040 castellated",
      "prompt": "What RP2040 castellated molecules do we have?"
    }
  ],
  "component": {
    "mpn": "RP2040 PICAN Castellated Molecule v1",
    "manufacturer": "",
    "package": "",
    "pin_count": null,
    "category": "molecule",
    "subcategory": "",
    "body_size": null,
    "parts": {},
    "distributor_links": {}
  },
  "readme": "# RP2040 PICAN Castellated Molecule v1\n\nCastellated RP2040 molecule with integrated MCP251863 CAN bus controller/transceiver — 19×35 mm, 4 corner machine pins, 49 castellated machine contacts. USB-C, 16 MB QSPI flash, SWD debug, and 120 Ω CAN termination on-board.\n\n## Overview\n\n| Property | Value |\n|---|---|\n| **Molecule ID** | `rp2040-pican-castellated-v1` |\n| **Board Size** | 19.0 × 35.0 mm |\n| **Layers** | 2 |\n| **MCU** | RP2040 (Raspberry Pi, QFN-56) |\n| **CAN Controller** | MCP251863T-E/9PX (Microchip, integrated CAN FD controller + transceiver) |\n| **Flash** | W25Q128JVPIQ — 16 MB QSPI |\n| **Regulator** | AP2112K-3.3 (3.3V LDO from 5V input) |\n| **USB** | USB-C 2.0 with USBLC6-2P6 ESD protection |\n| **Crystal** | 12 MHz (RP2040), 40 MHz (MCP251863) |\n| **Castellated Pads** | 49 machine contacts + 4 corner machine pins |\n| **KiCad Version** | 7/8 |\n\n## Key ICs\n\n| Ref | Part | Package | Function |\n|---|---|---|---|\n| U4 | RP2040 | QFN-56 | Dual-core Arm Cortex-M0+ MCU |\n| U2 | MCP251863T-E/9PX | VQFN-28 | CAN FD controller + transceiver (SPI interface) |\n| U3 | W25Q128JVPIQ | WSON-8 | 16 MB QSPI flash |\n| U6 | AP2112K-3.3 | SOT-23-5 | 3.3V 600mA LDO regulator |\n| U1 | USBLC6-2P6 | SOT-23-6 | USB ESD protection |\n| U5 | 74LVC1T45 | SOT-23-5 | Level translator (LED data) |\n\n## Machine Contact Pin Mapping\n\n4 corner machine pins (X1–X4) for power/ground, 49 castellated contacts for signals.\n\n### Corner Machine Pins\n\n| Pin | Position | Net | Function |\n|---|---|---|---|\n| X1 | Bottom-left (1, 7) | GND | Ground |\n| X2 | Top-left (1, -25) | +3V3 | 3.3V output |\n| X3 | Top-right (17, -25) | +5V | 5V input |\n| X4 | Bottom-right (17, 7) | GND | Ground |\n\n### Left Edge Contacts (bottom to top)\n\n| Contact | Net | Function |\n|---|---|---|\n| X54 | STBY | CAN standby control |\n| X43 | nINT0/GPIO0/XSTBY | CAN interrupt 0 / GPIO0 |\n| X42 | nINT1/GPIO1 | CAN interrupt 1 / GPIO1 |\n| X47 | nINT | CAN interrupt |\n| X15 | GPIO10 | General purpose I/O |\n| X14 | GPIO9 | General purpose I/O |\n| X13 | GPIO8 | General purpose I/O |\n| X12 | GPIO7 | General purpose I/O |\n| X11 | GPIO6 | General purpose I/O |\n| X10 | GPIO5 | General purpose I/O |\n| X9 | GPIO4 | General purpose I/O |\n| X8 | GPIO3 / SCL1 | I2C1 clock |\n| X7 | GPIO2 / SDA1 | I2C1 data |\n| X6 | GPIO1 / RX0 | UART0 RX |\n| X5 | GPIO0 / TX0 | UART0 TX |\n\n### Right Edge Contacts (bottom to top)\n\n| Contact | Net | Function |\n|---|---|---|\n| X56 | CANL | CAN Low bus line |\n| X55 | CANH | CAN High bus line |\n| X44 | RXD | CAN RX data |\n| X53 | TXD | CAN TX data |\n| X23 | GPIO19 | General purpose I/O |\n| X24 | GPIO20 / SDI | SPI data in |\n| X25 | GPIO21 / CS | SPI chip select |\n| X26 | GPIO22 / SCK | SPI clock |\n| X27 | GPIO23 / SDO | SPI data out |\n| X37 | GPIO24 | General purpose I/O |\n| X29 | GPIO25 | General purpose I/O |\n| X30 | A0 (GPIO26) | ADC channel 0 |\n| X31 | A1 (GPIO27) | ADC channel 1 |\n| X32 | A2 (GPIO28) | ADC channel 2 |\n| X33 | A3 (GPIO29) | ADC channel 3 |\n\n### Top Edge Contacts (left to right)\n\n| Contact | Net | Function |\n|---|---|---|\n| X57 | RST | Reset |\n| X36 | BOOT | Bootloader select |\n| X22 | GPIO17 / LED | User LED data line |\n| X41 | USB+ | USB data positive |\n| X40 | USB- | USB data negative |\n| X35 | SWD_IO | SWD debug data |\n| X34 | SWD_CLK | SWD debug clock |\n\n### Bottom Edge Contacts (left to right)\n\n| Contact | Net | Function |\n|---|---|---|\n| X16 | GPIO11 | General purpose I/O |\n| X17 | GPIO12 | General purpose I/O |\n| X18 | GPIO13 | General purpose I/O |\n| X19 | GPIO14 | General purpose I/O |\n| X20 | GPIO15 | General purpose I/O |\n| X21 | GPIO16 | General purpose I/O |\n| X38 | GPIO18 | General purpose I/O |\n\n## CAN Bus Interface\n\nThe MCP251863T provides integrated CAN FD controller and transceiver connected to the RP2040 via SPI. Features:\n\n- CAN 2.0B and CAN FD support\n- On-board 120 Ω termination resistor (R20, solder jumper configurable)\n- CANH/CANL brought out to castellated pads X55/X56\n- 40 MHz crystal (Y2)\n- Interrupt lines (nINT, nINT0, nINT1) exposed on left edge\n\n## Power\n\n| Rail | Source | Regulator |\n|---|---|---|\n| +5V | USB-C or X3 corner pin | Input rail |\n| +3V3 | AP2112K-3.3 LDO from 5V | Powers RP2040, flash, CAN controller |\n| +1V1 | RP2040 internal | Core voltage |\n\n500 mA polyfuse (F1) on USB input. Schottky diode (D3, PMEG2010BELD) for reverse protection.\n\n## Solder Jumpers\n\n| Jumper | Default | Function |\n|---|---|---|\n| JP1 | Open | USB VBUS select |\n| JP2 | Bridged 1-2 | Power source select |\n| JP3 | Open | CAN termination enable |\n| JP4–JP9 | Bridged | GPIO routing configuration |\n| JP10–JP12 | Bridged | CAN signal routing |\n\n## Debug & Programming\n\n- **USB-C**: Native USB bootloader (hold BOOT + reset)\n- **SWD**: Test points TP1 (CLK) and TP2 (DIO), also on castellated pads X34/X35\n- **BOOT button**: SW1\n- **Reset button**: SW2\n\n## Fabrication\n\n- Gerber files: `jlcpcb/gerber/`\n- Production files: `jlcpcb/production_files/`\n\n## Issues\n\n- No GLB 3D model included in the project — `packages3D_incomplete/` contains individual component models but no assembled board model\n- Lock files present (`~*.lck`) suggest the project may have been exported while open in KiCad\n",
  "author": {
    "name": "Kyle Bergstedt",
    "email": "kyle@adom.inc"
  },
  "visibility": {
    "public": true
  },
  "hero": null,
  "metadata": {},
  "created_at": "2026-05-28T05:30:48.738Z",
  "updated_at": "2026-05-28T05:30:48.738Z",
  "org": "adom"
}