# LAN7800: SuperSpeed USB 3.1 to Gigabit Ethernet Controller

The Microchip **LAN7800** is a single-chip **SuperSpeed USB 3.1 Gen 1 to 10/100/1000 Gigabit Ethernet** bridge controller. It folds a USB 3.1 Gen 1 device controller and PHY, a 10/100/1000 Ethernet MAC, and a Gigabit Ethernet PHY with HP Auto-MDIX into a single 48-pin QFN, giving a complete USB-to-Ethernet solution for docking stations, dongles, notebooks, set-top boxes and embedded systems. It is configured entirely through on-chip OTP memory (no external EEPROM) and ships with drivers for Windows, Linux, macOS, uBoot, UEFI, PXE and FreeBSD.

The interactive **symbol** and **footprint** viewers above are rendered by the wiki from the CAD shipped with this page. Use the toggle at the **top-right of the footprint viewer** to switch between the **QFN 7×7 mm (Y9X)** and **QFN 6×6 mm (VSX)** packages. Pin 1 is the square pad.

## Specifications

- **Host interface**: USB 3.1 Gen 1 (SuperSpeed, 5 Gbps)
- **Network**: 10 / 100 / 1000 Mbps Ethernet, IEEE 802.3/3u/3ab/3az
- **Integrated PHY**: Gigabit Ethernet PHY with HP Auto-MDIX
- **USB speeds**: SS 5 Gbps / HS 480 Mbps / FS 12 Mbps, 4 endpoints
- **Configuration**. On-chip OTP memory (no external EEPROM)
- **Low power**: Energy Efficient Ethernet (802.3az), Wake-on-LAN, NetDetach
- **GPIO**: 8, with flexible link/activity LEDs
- **I/O supply**: 1.8 to 3.3 V (variable)
- **Package**: 48-pin QFN, 7×7 mm (Y9X) or 6×6 mm (VSX)
- **Temperature**: Commercial 0 to +70 °C / Industrial −40 to +85 °C
- **Offloads**: 802.1q VLAN tagging, 9 KB jumbo frames, IPv4/IPv6/TCP/UDP checksum offload, 32 wake-up frame patterns

## Pin configuration

48 signal pins plus the exposed thermal pad (pin 49, VSS). Names and numbers match the schematic symbol and both footprints.

| Pin | Name | Group | Function |
|---|---|---|---|
| 1 | TR0P | Ethernet PHY | Gigabit Ethernet MDI pair 0 (+); 10/100/1000BASE-T media-dependent interface |
| 2 | TR0N | Ethernet PHY | Gigabit Ethernet MDI pair 0 (−); 10/100/1000BASE-T media-dependent interface |
| 3 | VDD25A | Power | 2.5 V analog supply |
| 4 | TR1P | Ethernet PHY | Gigabit Ethernet MDI pair 1 (+); 10/100/1000BASE-T media-dependent interface |
| 5 | TR1N | Ethernet PHY | Gigabit Ethernet MDI pair 1 (−); 10/100/1000BASE-T media-dependent interface |
| 6 | VDD25A | Power | 2.5 V analog supply |
| 7 | TR2P | Ethernet PHY | Gigabit Ethernet MDI pair 2 (+); 10/100/1000BASE-T media-dependent interface |
| 8 | TR2N | Ethernet PHY | Gigabit Ethernet MDI pair 2 (−); 10/100/1000BASE-T media-dependent interface |
| 9 | VDD25A | Power | 2.5 V analog supply |
| 10 | TR3P | Ethernet PHY | Gigabit Ethernet MDI pair 3 (+); 10/100/1000BASE-T media-dependent interface |
| 11 | TR3N | Ethernet PHY | Gigabit Ethernet MDI pair 3 (−); 10/100/1000BASE-T media-dependent interface |
| 12 | VDD25A | Power | 2.5 V analog supply |
| 13 | VDD12_SW_OUT | Power | 1.2 V switching-regulator output |
| 14 | VDD_SW_IN | Power | Switching-regulator input |
| 15 | VDD12_SW_FB | Power | 1.2 V switching-regulator feedback |
| 16 | EECS/GPIO0 | Config / GPIO | OTP/EEPROM chip-select (SPI), muxed with GPIO0 |
| 17 | EEDI/GPIO1 | Config / GPIO | OTP/EEPROM data-in (SPI), muxed with GPIO1 |
| 18 | EEDO/LED0/GPIO2 | Config / GPIO | OTP/EEPROM data-out (SPI), muxed with LED0 / GPIO2 |
| 19 | EECLK/LED1/GPIO3 | Config / GPIO | OTP/EEPROM clock (SPI), muxed with LED1 / GPIO3 |
| 20 | VDDVARIO | Power | Variable I/O supply (1.8 to 3.3 V) |
| 21 | VDD12CORE | Power | 1.2 V digital core supply |
| 22 | PME_N/GPIO4 | LED / GPIO | Power-management-event output, muxed with GPIO4 |
| 23 | VBUS_DET | Control | USB VBUS detect input |
| 24 | SUSPEND_N/LED2/GPIO5 | LED / GPIO | Suspend indicator, muxed with LED2 / GPIO5 |
| 25 | VDD12A | Power | 1.2 V analog supply |
| 26 | USB2_DP | USB 2.0 | USB 2.0 High-/Full-Speed data + |
| 27 | USB2_DM | USB 2.0 | USB 2.0 High-/Full-Speed data − |
| 28 | USB3_TXDP | USB 3.1 SS | USB 3.1 Gen 1 SuperSpeed transmit + |
| 29 | USB3_TXDM | USB 3.1 SS | USB 3.1 Gen 1 SuperSpeed transmit − |
| 30 | VDD12A | Power | 1.2 V analog supply |
| 31 | USB3_RXDP | USB 3.1 SS | USB 3.1 Gen 1 SuperSpeed receive + |
| 32 | USB3_RXDM | USB 3.1 SS | USB 3.1 Gen 1 SuperSpeed receive − |
| 33 | LED3/GPIO6 | LED / GPIO | Link/activity LED, muxed with GPIO (LED3/GPIO6) |
| 34 | TEST | Control | Factory test. Connect per datasheet |
| 35 | RESET_N/PME_CLEAR | Control | Active-low chip reset, muxed with PME clear |
| 36 | VDDVARIO | Power | Variable I/O supply (1.8 to 3.3 V) |
| 37 | USBRBIAS | Analog | USB bias: external reference resistor |
| 38 | VDD33A | Power | 3.3 V analog supply |
| 39 | VDDVARIO | Power | Variable I/O supply (1.8 to 3.3 V) |
| 40 | XI | Clock | 25 MHz crystal / external clock input |
| 41 | XO | Clock | 25 MHz crystal output |
| 42 | VDD12CORE | Power | 1.2 V digital core supply |
| 43 | PME_MODE/GPIO7 | LED / GPIO | PME mode strap, muxed with GPIO7 |
| 44 | VDD12A | Power | 1.2 V analog supply |
| 45 | VDD25_REG_OUT | Power | 2.5 V internal-regulator output |
| 46 | VDD33_REG_IN | Power | 3.3 V internal-regulator input |
| 47 | REF_REXT | Analog | PHY bias: external reference resistor to ground |
| 48 | REF_FILT | Analog | PHY internal-regulator filter connection |
| 49 | VSS | Ground | Exposed thermal pad. Connect to ground with a via field |

## Component variants

Eight orderable part numbers exist. All are the **identical LAN7800 silicon**. They differ only in package body size, operating-temperature grade and shipping/packaging. There are no functional or electrical differences.

The order code is `LAN7800` `[T]` `[-I]` `/` `{Y9X | VSX}`. Where `T` = Tape & Reel (blank = tray), `-I` = Industrial (blank = Commercial), `Y9X` = 7×7 mm and `VSX` = 6×6 mm.

### QFN 7×7 mm: package code Y9X *(default footprint)*

0.5 mm pitch, 5.3 × 5.3 mm exposed pad, 1.0 mm body height.

| Order code | Packaging | Temperature grade |
|---|---|---|
| `LAN7800/Y9X` | Tray | Commercial (0 to +70 °C) |
| `LAN7800T/Y9X` | Tape & Reel | Commercial (0 to +70 °C) |
| `LAN7800-I/Y9X` | Tray | Industrial (−40 to +85 °C) |
| `LAN7800T-I/Y9X` | Tape & Reel | Industrial (−40 to +85 °C) |

### QFN 6×6 mm: package code VSX

0.4 mm pitch, 4.3 × 4.3 mm exposed pad, 0.9 mm body height. Same pinout, smaller board area.

| Order code | Packaging | Temperature grade |
|---|---|---|
| `LAN7800/VSX` | Tray | Commercial (0 to +70 °C) |
| `LAN7800T/VSX` | Tape & Reel | Commercial (0 to +70 °C) |
| `LAN7800-I/VSX` | Tray | Industrial (−40 to +85 °C) |
| `LAN7800T-I/VSX` | Tape & Reel | Industrial (−40 to +85 °C) |

## Assets

KiCad symbol, both footprints and the 3D models, plus the canonical **adom-lbr JSON** the rest is generated from.

| Tool | Files |
|---|---|
| **KiCad** | [`lan7800.kicad_sym`](lan7800.kicad_sym), [`lan7800-qfn48-7x7-y9x.kicad_mod`](lan7800-qfn48-7x7-y9x.kicad_mod), [`lan7800-qfn48-6x6-vsx.kicad_mod`](lan7800-qfn48-6x6-vsx.kicad_mod) |
| **3D models** | [`lan7800.step`](lan7800.step), [`lan7800.glb`](lan7800.glb) |
| **Canonical** | [`lan7800.adom-lbr.json`](lan7800.adom-lbr.json) |
| **Fusion 360 / EAGLE** | *Not available yet* |
| **Altium** | *Not available yet* |

## Applications

Boards on the Adom wiki that use the LAN7800:

1. [**USB3.0 to Ethernet Molecule**](https://wiki.adom.inc/adom/usb3-to-ethernet-dataonly-molecule): USB-C to Gigabit Ethernet (data-only) adapter on the LAN7800 (U1).

Related tooling: [**LAN7800 EEPROM Programmer**](https://wiki.adom.inc/adom/lan7800-programmer).

## Provenance

- **Datasheet:** [Microchip LAN7800 (DS00001992)](docs/lan7800-datasheet.pdf)
- **Symbol, QFN 7×7 (Y9X) footprint, STEP + GLB:** Adom library, from the canonical adom-lbr JSON.
- **QFN 6×6 (VSX) footprint:** KiCad official library (`QFN-48-1EP_6x6mm_P0.4mm_EP4.3x4.3mm`).
- **Fusion and Altium libraries are deliberately absent**. They were generated rather than hand-verified, and the generated Altium symbol encoding has produced wrong geometry before.