{
  "symbolName": "S32K344",
  "manufacturer": "NXP Semiconductors",
  "package": "HDQFP-172",
  "description": "ASIL D Lockstep Core Arm Cortex-M7 4MB Automotive MCU, 160 MHz, CAN-FD, Ethernet, ADC",
  "datasheetUrl": "https://www.nxp.com/docs/en/data-sheet/S32K3xx.pdf",
  "pinCount": 172,
  "pinDescriptions": {
    "PTA0": "GPIO / LPUART0_CTS / LPSPI0_PCS1 / TRGMUX_OUT3. General-purpose I/O with LPUART0 clear-to-send and LPSPI0 chip select...",
    "PTA1": "GPIO / LPUART0_RTS / LPSPI0_SOUT / FLEXIO_D2. General-purpose I/O with LPUART0 request-to-send and FlexIO channel 2.",
    "PTA2": "GPIO / LPUART0_TX / eMIOS0_CH0. LPUART0 transmit data or eMIOS0 timer channel 0 (IC/OC/PWM).",
    "PTA3": "GPIO / LPUART0_RX / eMIOS0_CH1. LPUART0 receive data or eMIOS0 timer channel 1 (IC/OC/PWM).",
    "PTA4": "GPIO / eMIOS1_CH0 / LPSPI3_PCS3. Timer channel or SPI chip select alternate.",
    "PTA5": "GPIO / eMIOS1_CH1 / LPSPI3_PCS2. Timer channel or SPI chip select alternate.",
    "PTA6": "GPIO / LPUART1_CTS / eMIOS0_CH2 / LPSPI1_PCS1. LPUART1 flow control or timer.",
    "PTA7": "GPIO / LPUART1_RTS / eMIOS0_CH3 / LPSPI1_PCS0. LPUART1 flow control or SPI chip select.",
    "PTA8": "GPIO / LPUART1_TX / eMIOS0_CH4 / LPSPI1_SOUT. LPUART1 transmit or SPI data out.",
    "PTA9": "GPIO / LPUART1_RX / eMIOS0_CH5 / LPSPI1_SIN. LPUART1 receive or SPI data in.",
    "PTA10": "GPIO / eMIOS0_CH6 / LPSPI1_SCK. Timer channel or SPI clock alternate function.",
    "PTA11": "GPIO / eMIOS0_CH7 / LPI2C0_SDA. Timer channel or I2C data line. Requires external 4.7kΩ pull-up for I2C.",
    "PTA14": "GPIO / eMIOS1_CH2 / LPSPI1_PCS2. Adjacent to FXOSC — limit to static GPIO operation to avoid clock jitter degradation.",
    "PTA15": "GPIO / LPUART2_TX / eMIOS1_CH3. LPUART2 transmit or timer channel.",
    "PTA16": "GPIO / LPUART2_RX / eMIOS1_CH4. LPUART2 receive or timer channel.",
    "PTA17": "GPIO / eMIOS1_CH5 / FlexCAN0_TX. Timer or CAN bus transmit.",
    "PTA24": "GPIO / eMIOS1_CH6 / FlexCAN0_RX. Timer or CAN bus receive.",
    "PTA25": "GPIO / eMIOS1_CH7 / LPUART2_CTS. Timer or UART flow control.",
    "PTA26": "GPIO / eMIOS1_CH8 / LPUART2_RTS. Timer or UART flow control.",
    "PTA27": "GPIO / eMIOS1_CH9 / LPI2C0_SCL. Timer or I2C clock. Requires 4.7kΩ external pull-up for I2C.",
    "PTA28": "GPIO / eMIOS1_CH10 / FlexCAN1_TX. Timer or CAN-FD bus transmit.",
    "PTA29": "GPIO / eMIOS1_CH11 / FlexCAN1_RX. Timer or CAN-FD bus receive.",
    "PTA30": "GPIO / eMIOS1_CH12 / LPSPI0_PCS0. Timer or SPI chip select.",
    "PTA31": "GPIO / eMIOS1_CH13 / LPSPI0_SCK. Timer or SPI clock.",
    "PTB0": "GPIO / eMIOS1_CH14 / LPSPI0_SOUT. Timer or SPI data output.",
    "PTB1": "GPIO / eMIOS1_CH15 / LPSPI0_SIN. Timer or SPI data input.",
    "PTB2": "GPIO / eMIOS1_CH16 / LPUART3_TX. Timer or LPUART3 transmit.",
    "PTB3": "GPIO / eMIOS1_CH17 / LPUART3_RX. Timer or LPUART3 receive.",
    "PTB4": "GPIO / LPI2C1_SDA / eMIOS1_CH18. I2C1 data or timer. Requires 4.7kΩ pull-up for I2C.",
    "PTB5": "GPIO / LPI2C1_SCL / eMIOS1_CH19. I2C1 clock or timer. Requires 4.7kΩ pull-up for I2C.",
    "PTB6": "GPIO / FlexCAN2_TX / eMIOS1_CH20. CAN-FD bus 2 transmit or timer.",
    "PTB7": "GPIO / FlexCAN2_RX / eMIOS1_CH21. CAN-FD bus 2 receive or timer.",
    "PTB8": "GPIO / LPUART4_TX / eMIOS0_CH8. LPUART4 transmit or timer.",
    "PTB9": "GPIO / LPUART4_RX / eMIOS0_CH9. LPUART4 receive or timer.",
    "PTB10": "GPIO / eMIOS0_CH10 / LPSPI2_SCK. Timer or LPSPI2 clock.",
    "PTB11": "GPIO / eMIOS0_CH11 / LPSPI2_SIN. Timer or LPSPI2 data in.",
    "PTB12": "GPIO / eMIOS0_CH12 / LPSPI2_SOUT. Timer or LPSPI2 data out.",
    "PTB13": "GPIO / eMIOS0_CH13 / LPSPI2_PCS0. Timer or LPSPI2 chip select.",
    "PTB14": "GPIO / FlexCAN3_TX / eMIOS0_CH14. CAN-FD bus 3 transmit or timer.",
    "PTB15": "GPIO / FlexCAN3_RX / eMIOS0_CH15. CAN-FD bus 3 receive or timer.",
    "PTB16": "GPIO / LPUART5_TX / eMIOS0_CH16. LPUART5 transmit or timer.",
    "PTB17": "GPIO / LPUART5_RX / eMIOS0_CH17. LPUART5 receive or timer.",
    "PTB18": "GPIO / SAI0_BCLK / eMIOS0_CH18. Synchronous Audio Interface 0 bit clock or timer.",
    "PTB19": "GPIO / SAI0_D0 / eMIOS0_CH19. SAI0 data line 0 or timer.",
    "PTB20": "GPIO / SAI0_SYNC. SAI0 frame sync signal.",
    "PTB21": "GPIO / SAI0_MCLK. SAI0 master clock output.",
    "PTB22": "GPIO / LPUART6_TX / eMIOS0_CH20. LPUART6 transmit or timer.",
    "PTB23": "GPIO / LPUART6_RX / eMIOS0_CH21. LPUART6 receive or timer.",
    "PTB24": "GPIO / FlexCAN4_TX / eMIOS0_CH22. CAN-FD bus 4 transmit or timer.",
    "PTB25": "GPIO / FlexCAN4_RX / eMIOS0_CH23. CAN-FD bus 4 receive or timer.",
    "PTB26": "GPIO / LPUART7_TX / FLEXIO_D0. LPUART7 transmit or FlexIO channel.",
    "PTB27": "GPIO / LPUART7_RX / FLEXIO_D1. LPUART7 receive or FlexIO channel.",
    "PTB28": "GPIO / FLEXIO_D2 / eMIOS2_CH0. FlexIO channel or eMIOS2 timer.",
    "PTB29": "GPIO / FLEXIO_D3 / eMIOS2_CH1. FlexIO channel or eMIOS2 timer.",
    "PTB30": "GPIO / FLEXIO_D4 / eMIOS2_CH2. FlexIO channel or eMIOS2 timer.",
    "PTB31": "GPIO / FLEXIO_D5 / eMIOS2_CH3. FlexIO channel or eMIOS2 timer.",
    "PTC0": "GPIO / ADC0_S8 / eMIOS2_CH4. 12-bit ADC0 standard channel 8 (0–5.5V input range) or timer.",
    "PTC1": "GPIO / ADC0_S9 / eMIOS2_CH5. ADC0 channel 9 or timer.",
    "PTC2": "GPIO / ADC0_S10 / eMIOS2_CH6. ADC0 channel 10 or timer.",
    "PTC3": "GPIO / ADC0_S11 / eMIOS2_CH7. ADC0 channel 11 or timer.",
    "PTC4": "GPIO / ADC0_S12 / LPUART8_TX. ADC0 channel 12 or LPUART8 transmit.",
    "PTC5": "GPIO / ADC0_S13 / LPUART8_RX. ADC0 channel 13 or LPUART8 receive.",
    "PTC6": "GPIO / ADC0_S14 / FlexCAN5_TX. ADC0 channel 14 or CAN-FD bus 5 transmit.",
    "PTC7": "GPIO / ADC0_S15 / FlexCAN5_RX. ADC0 channel 15 or CAN-FD bus 5 receive.",
    "PTC8": "GPIO / ADC1_S0 / eMIOS2_CH8. 12-bit ADC1 channel 0 or eMIOS2 timer.",
    "PTC9": "GPIO / ADC1_S1 / eMIOS2_CH9. ADC1 channel 1 or timer.",
    "PTC10": "GPIO / ADC1_S2 / eMIOS2_CH10. ADC1 channel 2 or timer.",
    "PTC11": "GPIO / ADC1_S3 / eMIOS2_CH11. ADC1 channel 3 or timer.",
    "PTC12": "GPIO / ADC1_S4 / LPSPI3_SCK. ADC1 channel 4 or LPSPI3 clock.",
    "PTC13": "GPIO / ADC1_S5 / LPSPI3_SIN. ADC1 channel 5 or LPSPI3 data in.",
    "PTC14": "GPIO / ADC1_S6 / LPSPI3_SOUT. ADC1 channel 6 or LPSPI3 data out.",
    "PTC15": "GPIO / ADC1_S7 / LPSPI3_PCS0. ADC1 channel 7 or LPSPI3 chip select.",
    "PTC16": "GPIO / ADC1_S8 / LPUART9_TX. ADC1 channel 8 or LPUART9 transmit.",
    "PTC17": "GPIO / ADC1_S9 / LPUART9_RX. ADC1 channel 9 or LPUART9 receive.",
    "PTC18": "GPIO / ADC1_S10 / LPUART10_TX. ADC1 channel 10 or LPUART10 transmit.",
    "PTC19": "GPIO / ADC1_S11 / LPUART10_RX. ADC1 channel 11 or LPUART10 receive.",
    "PTC20": "GPIO / ADC1_S12 / eMIOS2_CH12. ADC1 channel 12 or timer.",
    "PTC21": "GPIO / ADC1_S13 / eMIOS2_CH13. ADC1 channel 13 or timer.",
    "PTC22": "GPIO / ADC1_S14 / eMIOS2_CH14. ADC1 channel 14 or timer.",
    "PTC23": "GPIO / ADC1_S15 / eMIOS2_CH15. ADC1 channel 15 or timer.",
    "PTC24": "GPIO / eMIOS2_CH16 / LPCMP0_IN0. Timer or low-power comparator 0 non-inverting input.",
    "PTC25": "GPIO / eMIOS2_CH17 / LPCMP0_IN1. Timer or low-power comparator 0 inverting input.",
    "PTC26": "GPIO / eMIOS2_CH18 / LPCMP1_IN0. Timer or low-power comparator 1 non-inverting input.",
    "PTC27": "GPIO / eMIOS2_CH19 / LPCMP1_IN1. Timer or low-power comparator 1 inverting input.",
    "PTC28": "GPIO / eMIOS2_CH20 / LPCMP2_IN0. Timer or low-power comparator 2 input.",
    "PTC29": "GPIO / eMIOS2_CH21 / LPCMP2_IN1. Timer or low-power comparator 2 input.",
    "PTC30": "GPIO / eMIOS2_CH22. Timer channel.",
    "PTC31": "GPIO / eMIOS2_CH23. Timer channel.",
    "PTD0": "GPIO / FLEXIO_D6 / LPUART11_TX. FlexIO channel 6 or LPUART11 transmit.",
    "PTD1": "GPIO / FLEXIO_D7 / LPUART11_RX. FlexIO channel 7 or LPUART11 receive.",
    "PTD2": "GPIO / FLEXIO_D8 / LPUART12_TX. FlexIO channel 8 or LPUART12 transmit.",
    "PTD3": "GPIO / FLEXIO_D9 / LPUART12_RX. FlexIO channel 9 or LPUART12 receive.",
    "PTD4": "GPIO / FLEXIO_D10 / LPUART13_TX. FlexIO channel 10 or LPUART13 transmit.",
    "PTD5": "GPIO / FLEXIO_D11 / LPUART13_RX. FlexIO channel 11 or LPUART13 receive.",
    "PTD6": "GPIO / FLEXIO_D12 / EMAC_MII_RMII_TX_CLK. FlexIO or Ethernet RMII transmit clock.",
    "PTD7": "GPIO / FLEXIO_D13 / EMAC_MII_RMII_TXD0. FlexIO or Ethernet RMII transmit data 0.",
    "PTD8": "GPIO / FLEXIO_D14 / EMAC_MII_RMII_TXD1. FlexIO or Ethernet RMII transmit data 1.",
    "PTD9": "GPIO / FLEXIO_D15 / EMAC_MII_RMII_TX_EN. FlexIO or Ethernet RMII transmit enable.",
    "PTD10": "GPIO / EMAC_MII_RMII_RX_CLK. Ethernet RMII receive clock input (50 MHz reference).",
    "PTD11": "GPIO / EMAC_MII_RMII_RXD0. Ethernet RMII receive data 0.",
    "PTD12": "GPIO / EMAC_MII_RMII_RXD1. Ethernet RMII receive data 1.",
    "PTD13": "GPIO / EMAC_MII_RMII_RX_DV. Ethernet RMII receive data valid / carrier sense.",
    "PTD14": "GPIO / EMAC_MII_RMII_RX_ER. Ethernet RMII receive error.",
    "PTD15": "GPIO / EMAC_MII_RMII_MDIO. Ethernet management data I/O (MDIO). Requires 1.5kΩ pull-up for MDIO bus.",
    "PTD16": "GPIO / EMAC_MII_RMII_MDC. Ethernet management data clock (MDC). Max 2.5 MHz.",
    "PTD17": "GPIO / SAI1_BCLK / LPUART14_TX. SAI1 bit clock or LPUART14 transmit.",
    "PTD18": "GPIO / SAI1_D0 / LPUART14_RX. SAI1 data or LPUART14 receive.",
    "PTD19": "GPIO / SAI1_SYNC / LPUART15_TX. SAI1 frame sync or LPUART15 transmit.",
    "PTD20": "GPIO / SAI1_MCLK / LPUART15_RX. SAI1 master clock or LPUART15 receive.",
    "PTD21": "GPIO / LPSPI4_SCK. LPSPI4 clock.",
    "PTD22": "GPIO / LPSPI4_SIN. LPSPI4 data in.",
    "PTD23": "GPIO / LPSPI4_SOUT. LPSPI4 data out.",
    "PTD24": "GPIO / LPSPI4_PCS0. LPSPI4 chip select 0.",
    "PTD25": "GPIO / LPSPI5_SCK. LPSPI5 clock.",
    "PTD26": "GPIO / LPSPI5_SIN. LPSPI5 data in.",
    "PTD27": "GPIO / LPSPI5_SOUT. LPSPI5 data out.",
    "PTD28": "GPIO / LPSPI5_PCS0. LPSPI5 chip select 0.",
    "PTD29": "GPIO / QSPI_A_SCK. QuadSPI clock for external NOR flash. SDR up to 120 MHz.",
    "PTD30": "GPIO / QSPI_A_PCS0. QuadSPI chip select for external NOR flash.",
    "PTD31": "GPIO / QSPI_A_DATA0. QuadSPI data line 0 (MOSI in SPI mode).",
    "PTE0": "GPIO / QSPI_A_DATA1. QuadSPI data line 1 (MISO in SPI mode).",
    "PTE1": "GPIO / QSPI_A_DATA2. QuadSPI data line 2 (active in quad/octal modes).",
    "PTE2": "GPIO / QSPI_A_DATA3. QuadSPI data line 3 (active in quad/octal modes).",
    "PTE3": "GPIO / QSPI_A_DQS. QuadSPI data strobe for DDR mode. Internal DQS dummy pad loopback on S32K344.",
    "PTE4": "GPIO / TRACE_D0. Trace data bit 0 for debug trace output.",
    "PTE5": "GPIO / TRACE_D1. Trace data bit 1.",
    "PTE6": "GPIO / TRACE_D2. Trace data bit 2.",
    "PTE7": "GPIO / TRACE_D3. Trace data bit 3.",
    "PTE8": "GPIO / TRACE_CLK. Trace clock output for debug trace.",
    "PTE9": "GPIO / JTAG_TMS / SWD_DIO. JTAG test mode select or Serial Wire Debug data I/O.",
    "PTE10": "GPIO / JTAG_TCK / SWD_CLK. JTAG test clock or Serial Wire Debug clock input.",
    "PTE11": "GPIO / JTAG_TDO / SWO. JTAG test data output or Serial Wire Output for trace.",
    "PTE12": "GPIO / JTAG_TDI. JTAG test data input. Has internal pull-up.",
    "PTE13": "GPIO / JTAG_TRST. JTAG test reset. Has internal pull-up.",
    "PTE14": "GPIO / SXOSC_IN. 32.768 kHz slow external oscillator input for RTC.",
    "PTE15": "GPIO / SXOSC_OUT. 32.768 kHz slow oscillator output. Crystal connection for RTC.",
    "PTE16": "GPIO / TEST. Factory test mode pin — connect to VSS for normal operation.",
    "PTE17": "GPIO. General-purpose I/O.",
    "NC": "No connect. Leave unconnected.",
    "RESET_B": "Active-low system reset input with internal pull-up. Assert low for >1ms to reset the MCU. Has internal glitch filter...",
    "NMI_B": "Active-low non-maskable interrupt input with internal pull-up. Directly triggers NMI exception on the Cortex-M7. Use ...",
    "EXTAL": "Fast external oscillator input (FXOSC). Connect 8–40 MHz crystal between EXTAL and XTAL with appropriate load capacit...",
    "XTAL": "Fast external oscillator output (FXOSC). Crystal connection — do not load with external circuitry beyond the crystal ...",
    "VREFH": "ADC high reference voltage input. 2.97–5.5V range. Must equal or be close to VDD_HV_A. Decouple with 100nF ceramic ca...",
    "VREFL": "ADC low reference voltage input. Connect to VSS through a short, low-impedance path. Must be within 100mV of VSS for ...",
    "VRC_CTRL": "V15 regulator control output. Drives the base of an external NPN ballast transistor for the 1.5V regulator stage. Con...",
    "VDD_HV_A": "Main I/O and analog supply. 2.97–5.5V.",
    "VDD_HV_B": "Secondary I/O supply voltage. 2.97–5.5V.",
    "V25": "Flash memory supply (2.5V), internally regulated from VDD_HV_A. Decouple with 220nF ceramic capacitor. Do not connect...",
    "V15": "High-current 1.5V logic supply. Decouple with 100nF ceramic.",
    "V11": "Core logic supply (1.1V), internally regulated. Decouple with 100nF ceramic.",
    "VSS": "Ground."
  },
  "groupDescriptions": {
    "PORT A": "Port A GPIO pins (PTA0–PTA31). Multiplexed with LPUART0–2, LPI2C0, LPSPI0–1, FlexCAN0–1, and eMIOS0–1 timer channels. Each pin is configured via the SIUL2 IMCR/MSCR registers for pad muxing, drive strength, and pull-up/down.",
    "PORT B": "Port B GPIO pins (PTB0–PTB31). Multiplexed with LPUART3–7, LPI2C1, LPSPI2, FlexCAN2–4, SAI0, FlexIO, and eMIOS0–2 timer channels. Powered by VDD_HV_B supply domain.",
    "PORT C": "Port C GPIO pins (PTC0–PTC31). Host to all ADC0 (channels 8–15) and ADC1 (channels 0–15) analog inputs, plus LPCMP0–2 comparator inputs, LPSPI3, LPUART8–10, FlexCAN5, and eMIOS2 timer channels.",
    "PORT D": "Port D GPIO pins (PTD0–PTD31). Multiplexed with Ethernet RMII (EMAC), SAI1, LPSPI4–5, LPUART11–15, FlexIO, QuadSPI, and additional eMIOS2 channels. Key networking and high-speed peripheral port.",
    "PORT E": "Port E GPIO pins (PTE0–PTE17). Includes QuadSPI data lines, JTAG/SWD debug interface, trace port, and 32.768 kHz slow oscillator (SXOSC) for RTC. Essential for debug access and external NOR flash.",
    "POWER SUPPLY": "Main power supply inputs. VDD_HV_A (2.97–5.5V) powers the primary I/O domain and analog circuits. VDD_HV_B powers the secondary I/O domain. Both require 4.7µF bulk capacitor plus 100nF decoupling per pin.",
    "INTERNAL SUPPLY": "Internal voltage regulator outputs and inputs. V25 (2.5V) powers flash memory. V15 (1.5V) is the high-current logic supply requiring an external NPN ballast transistor. V11 (1.1V) is the internally-regulated core supply. Each requires specific decoupling capacitors.",
    "GROUND": "Ground reference pins. All VSS pins must be connected to a solid, low-impedance ground plane. Critical for analog ADC accuracy, signal integrity, and EMC compliance in automotive environments.",
    "ADC REFERENCE": "ADC voltage reference pins. VREFH sets the ADC full-scale voltage (typically tied to VDD_HV_A). VREFL must be connected to VSS within 100mV. Both require careful decoupling for 12-bit ADC accuracy.",
    "REGULATOR": "Voltage regulator control output. VRC_CTRL drives an external NPN transistor base for the V15 (1.5V) linear regulator. Connect through a 2.2kΩ base resistor. This is the 'last mile regulator' for the 1.5V supply.",
    "CLOCK": "Crystal oscillator interface. EXTAL/XTAL connect to an 8–40 MHz crystal for the Fast External Oscillator (FXOSC). Supports crystal mode and single-ended bypass mode. PLL multiplies this to the 160 MHz core clock.",
    "SYSTEM": "System control pins. RESET_B provides hardware reset with glitch filtering and POR detection. NMI_B triggers non-maskable interrupts for safety-critical events. NC pin must be left unconnected."
  }
}