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YT8531H-CA
Public Made by Adomby adom
Motorcomm Ethernet Transceivers, QFN-40(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+314−8@@ -1,13 +1,324 @@ {+ "schema_version": 1,+ "type": "component", "slug": "yt8531h-ca",+ "title": "YT8531H-CA",+ "brief": "Motorcomm Ethernet Transceivers, QFN-40(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Motorcomm Ethernet Transceivers, QFN-40(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "yt8531h-ca" ],+ "component": {+ "mpn": "YT8531H-CA",+ "manufacturer": "Motorcomm",+ "package": "QFN-40(5x5)",+ "pin_count": 41,+ "category": "Interface",+ "subcategory": "Ethernet Transceivers",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2404010946_Motorcomm-YT8531H-CA_C22373778.pdf",+ "parts": {+ "symbol": "yt8531h-ca.kicad_sym",+ "footprint": "yt8531h-ca.kicad_mod",+ "model_3d": "yt8531h-ca.glb",+ "model_3d_step": "yt8531h-ca.step",+ "lbr": "yt8531h-ca.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "TRXP0",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 0, positive. 100\u03a9 differential transmission line for MDI pair A."+ },+ {+ "number": "2",+ "name": "TRXN0",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 0, negative. 100\u03a9 differential transmission line for MDI pair A."+ },+ {+ "number": "3",+ "name": "AVDDL",+ "type": "power_in",+ "description": "Analog power supply, 1.1V/1.2V. Bypass locally with a decoupling capacitor."+ },+ {+ "number": "4",+ "name": "TRXP1",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 1, positive. 100\u03a9 differential transmission line for MDI pair B."+ },+ {+ "number": "5",+ "name": "TRXN1",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 1, negative. 100\u03a9 differential transmission line for MDI pair B."+ },+ {+ "number": "6",+ "name": "TRXP2",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 2, positive. 100\u03a9 differential transmission line for MDI pair C."+ },+ {+ "number": "7",+ "name": "TRXN2",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 2, negative. 100\u03a9 differential transmission line for MDI pair C."+ },+ {+ "number": "8",+ "name": "AVDDL",+ "type": "power_in",+ "description": "Analog power supply, 1.1V/1.2V. Bypass locally with a decoupling capacitor."+ },+ {+ "number": "9",+ "name": "TRXP3",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 3, positive. 100\u03a9 differential transmission line for MDI pair D."+ },+ {+ "number": "10",+ "name": "TRXN3",+ "type": "bidirectional",+ "description": "Media-dependent interface pair 3, negative. 100\u03a9 differential transmission line for MDI pair D."+ },+ {+ "number": "11",+ "name": "AVDD33",+ "type": "power_in",+ "description": "Analog 3.3V power supply for the PHY analog front end."+ },+ {+ "number": "12",+ "name": "RESET_N",+ "type": "input",+ "description": "Hardware reset, active low. Requires an external pull-up resistor; internal pull-up."+ },+ {+ "number": "13",+ "name": "MDC",+ "type": "input",+ "description": "MDIO Management Data Clock input from MAC. Internal pull-down."+ },+ {+ "number": "14",+ "name": "MDIO",+ "type": "bidirectional",+ "description": "MDIO Management Data I/O. Bidirectional; pull up to 3.3V/2.5V/1.8V matching I/O voltage. Internal pull-up."+ },+ {+ "number": "15",+ "name": "TXD3",+ "type": "input",+ "description": "RGMII transmit data bit 3 from MAC to PHY. Internal pull-down."+ },+ {+ "number": "16",+ "name": "TXD2",+ "type": "input",+ "description": "RGMII transmit data bit 2 from MAC to PHY. Internal pull-down."+ },+ {+ "number": "17",+ "name": "TXD1",+ "type": "input",+ "description": "RGMII transmit data bit 1 from MAC to PHY. Internal pull-down."+ },+ {+ "number": "18",+ "name": "TXD0",+ "type": "input",+ "description": "RGMII transmit data bit 0 from MAC to PHY. Internal pull-down."+ },+ {+ "number": "19",+ "name": "TX_CTL",+ "type": "input",+ "description": "RGMII transmit control signal from the MAC. Internal pull-down."+ },+ {+ "number": "20",+ "name": "TX_CLK",+ "type": "input",+ "description": "RGMII transmit reference clock from MAC (125/25/2.5 MHz depending on speed). Internal pull-down."+ },+ {+ "number": "21",+ "name": "DVDDL",+ "type": "power_in",+ "description": "Digital core power supply, 1.1V/1.2V."+ },+ {+ "number": "22",+ "name": "RXD3/PHYAD0",+ "type": "output",+ "description": "RGMII receive data bit 3 output to MAC. Latched at power-up as PHY address bit 0 (PHYAD0); internal pull-down default sets bit low."+ },+ {+ "number": "23",+ "name": "RXD2/PLLOFF",+ "type": "output",+ "description": "RGMII receive data bit 2 output. Latched at power-up as PLLOFF strap (sleep-mode PLL off configuration). Internal pull-down."+ },+ {+ "number": "24",+ "name": "RXD1/TXDLY",+ "type": "output",+ "description": "RGMII receive data bit 1 output. Latched at power-up as TXDLY strap; pull-up adds RGMII TXC delay for TXD latching. Internal pull-down."+ },+ {+ "number": "25",+ "name": "RXD0/RXDLY",+ "type": "output",+ "description": "RGMII receive data bit 0 output. Latched at power-up as RXDLY strap; pull-up adds 2ns delay on RX_CLK at 125MHz or 8ns at 25/2.5MHz. Internal pull-up."+ },+ {+ "number": "26",+ "name": "RX_CTL/PHYAD2",+ "type": "output",+ "description": "RGMII receive control signal to MAC. Latched at power-up as PHY address bit 2 (PHYAD2). Internal pull-down."+ },+ {+ "number": "27",+ "name": "RX_CLK/PHYAD1",+ "type": "output",+ "description": "RGMII continuous receive reference clock (125/25/2.5 MHz) derived from received data. Latched at power-up as PHY address bit 1 (PHYAD1). Internal pull-down."+ },+ {+ "number": "28",+ "name": "DVDD_RGMII",+ "type": "power_in",+ "description": "Digital I/O supply for RGMII, MDC, and MDIO pads. Voltage set by CFG_EXT and CFG_LDO[1:0]; supplied externally or from internal LDO. Requires bulk plus decoupling capacitor regardless of source."+ },+ {+ "number": "29",+ "name": "DVDD33",+ "type": "power_in",+ "description": "3.3V digital supply for non-RGMII I/O pads."+ },+ {+ "number": "30",+ "name": "REG_O",+ "type": "power_out",+ "description": "Internal switch-mode regulator 1.1V output for the YT8531H variant. Connect directly to an external 2.2 uH power inductor. (This pin is LDO_O on YT8531DH/DC and NC on YT8531P.)"+ },+ {+ "number": "31",+ "name": "INT_N/PME_N",+ "type": "output",+ "description": "Open-drain interrupt output (default INT_N, active low). Optionally reassigned as PME_N (Power Management Event, active low on magic-packet reception) via EXT 0xA00A bit[6]. Requires 3.3V external pull-up; leave floating if unused."+ },+ {+ "number": "32",+ "name": "LED0/CFG_EXT",+ "type": "output",+ "description": "LED0 driver (light = 10 Mbps link up, blink = TX/RX activity). Latched at power-up as CFG_EXT strap selecting I/O pad power source (pull-up = external, pull-down = internal LDO). Internal pull-up."+ },+ {+ "number": "33",+ "name": "LED1/CFG_LDO0",+ "type": "output",+ "description": "LED1 driver (light = 100 Mbps link up, blink = TX/RX activity). Latched at power-up as CFG_LDO0, sets I/O pad LDO output voltage or external input voltage together with CFG_LDO1. Internal pull-up."+ },+ {+ "number": "34",+ "name": "LED2/CFG_LDO1",+ "type": "output",+ "description": "LED2 driver (light = 1000 Mbps link up, blink = TX/RX activity). Latched at power-up as CFG_LDO1, sets I/O pad LDO output voltage or external input voltage together with CFG_LDO0. Internal pull-down."+ },+ {+ "number": "35",+ "name": "CLKOUT",+ "type": "output",+ "description": "Reference clock output from internal PLL: 25 MHz reference clock or UTP-recovery receive clock for Synchronous Ethernet. Leave floating if unused by the MAC."+ },+ {+ "number": "36",+ "name": "XTAL_I",+ "type": "input",+ "description": "25 MHz crystal input pin. When using an external clock/oscillator driven into XTAL_O, short XTAL_I to GND; when driving a clock into XTAL_I, leave XTAL_O floating."+ },+ {+ "number": "37",+ "name": "XTAL_O",+ "type": "output",+ "description": "25 MHz crystal output pin. When using an external clock into XTAL_I, leave XTAL_O floating; when driving external source into XTAL_O, short XTAL_I to GND."+ },+ {+ "number": "38",+ "name": "AVDDL",+ "type": "power_in",+ "description": "Analog power supply, 1.1V/1.2V. Bypass locally with a decoupling capacitor."+ },+ {+ "number": "39",+ "name": "RBIAS",+ "type": "passive",+ "description": "Bias current reference. Requires an external 2.49 k\u03a9 \u00b11% resistor to GND."+ },+ {+ "number": "40",+ "name": "AVDD33",+ "type": "power_in",+ "description": "Analog 3.3V power supply for the PHY analog front end."+ },+ {+ "number": "41",+ "name": "GND",+ "type": "power_in",+ "description": "Exposed thermal/ground pad on the QFN underside. Must be soldered to the PCB ground plane for both electrical ground and thermal dissipation."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2404010946_Motorcomm-YT8531H-CA_C22373778.pdf",+ "pages": 66,+ "sha256": "fa0145e682bbdfad",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Motorcomm",+ "Package": "QFN-40(5x5)",+ "Category": "Interface",+ "Pins": "41"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "yt8531h-ca"+ ],+ "discovery_pitch": "YT8531H-CA (Motorcomm) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +336,5 @@ "docs/yt8531h-ca-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }