component
YT8531DH-CA
Public Made by Adomby adom
Motorcomm Ethernet Transceivers, QFN-40(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+314−8@@ -1,13 +1,324 @@ {+ "schema_version": 1,+ "type": "component", "slug": "yt8531dh-ca",+ "title": "YT8531DH-CA",+ "brief": "Motorcomm Ethernet Transceivers, QFN-40(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Motorcomm Ethernet Transceivers, QFN-40(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "yt8531dh-ca" ],+ "component": {+ "mpn": "YT8531DH-CA",+ "manufacturer": "Motorcomm",+ "package": "QFN-40(5x5)",+ "pin_count": 41,+ "category": "Interface",+ "subcategory": "Ethernet Transceivers",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/9ce30b61c1d565a37e1fc25cfd944151.pdf",+ "parts": {+ "symbol": "yt8531dh-ca.kicad_sym",+ "footprint": "yt8531dh-ca.kicad_mod",+ "model_3d": "yt8531dh-ca.glb",+ "model_3d_step": "yt8531dh-ca.step",+ "lbr": "yt8531dh-ca.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "TRXP0",+ "type": "bidirectional",+ "description": "Media-dependent interface 0 positive; 100\u03a9 differential MDI transmission line to magnetics/RJ45."+ },+ {+ "number": "2",+ "name": "TRXN0",+ "type": "bidirectional",+ "description": "Media-dependent interface 0 negative; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "3",+ "name": "AVDDL",+ "type": "power_in",+ "description": "Analog core power supply, 1.1V/1.2V. Sourced from internal LDO2 output (LDO_O, pin 30) on YT8531DH."+ },+ {+ "number": "4",+ "name": "TRXP1",+ "type": "bidirectional",+ "description": "Media-dependent interface 1 positive; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "5",+ "name": "TRXN1",+ "type": "bidirectional",+ "description": "Media-dependent interface 1 negative; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "6",+ "name": "TRXP2",+ "type": "bidirectional",+ "description": "Media-dependent interface 2 positive; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "7",+ "name": "TRXN2",+ "type": "bidirectional",+ "description": "Media-dependent interface 2 negative; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "8",+ "name": "AVDDL",+ "type": "power_in",+ "description": "Analog core power supply, 1.1V/1.2V. Second analog core-power pin; tie to same rail as pin 3."+ },+ {+ "number": "9",+ "name": "TRXP3",+ "type": "bidirectional",+ "description": "Media-dependent interface 3 positive; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "10",+ "name": "TRXN3",+ "type": "bidirectional",+ "description": "Media-dependent interface 3 negative; 100\u03a9 differential MDI transmission line."+ },+ {+ "number": "11",+ "name": "AVDD33",+ "type": "power_in",+ "description": "Analog 3.3V power supply for the PHY analog front end."+ },+ {+ "number": "12",+ "name": "RESET_N",+ "type": "input",+ "description": "Hardware reset, active low. Requires an external pull-up resistor (internal pull-up also present)."+ },+ {+ "number": "13",+ "name": "MDC",+ "type": "input",+ "description": "Management Data Clock (SMI/MDIO interface). Internal pull-down."+ },+ {+ "number": "14",+ "name": "MDIO",+ "type": "bidirectional",+ "description": "Management data input/output (SMI). Internal pull-up. Must be pulled up to 3.3V/2.5V/1.8V matching the RGMII I/O voltage."+ },+ {+ "number": "15",+ "name": "TXD3",+ "type": "input",+ "description": "RGMII transmit data bit 3 (MAC\u2192PHY on TXD[3:0]). Internal pull-down."+ },+ {+ "number": "16",+ "name": "TXD2",+ "type": "input",+ "description": "RGMII transmit data bit 2 (MAC\u2192PHY on TXD[3:0]). Internal pull-down."+ },+ {+ "number": "17",+ "name": "TXD1",+ "type": "input",+ "description": "RGMII transmit data bit 1 (MAC\u2192PHY on TXD[3:0]). Internal pull-down."+ },+ {+ "number": "18",+ "name": "TXD0",+ "type": "input",+ "description": "RGMII transmit data bit 0 (MAC\u2192PHY on TXD[3:0]). Internal pull-down."+ },+ {+ "number": "19",+ "name": "TX_CTL",+ "type": "input",+ "description": "RGMII transmit control signal from the MAC. Internal pull-down."+ },+ {+ "number": "20",+ "name": "TX_CLK",+ "type": "input",+ "description": "RGMII transmit reference clock from MAC. 125 MHz / 25 MHz / 2.5 MHz depending on link speed. Internal pull-down."+ },+ {+ "number": "21",+ "name": "DVDDL",+ "type": "power_in",+ "description": "Digital core power supply, 1.1V/1.2V. Fed from internal LDO2 output (pin 30) on YT8531DH."+ },+ {+ "number": "22",+ "name": "RXD3/PHYAD0",+ "type": "output",+ "description": "RGMII receive data bit 3 (PHY\u2192MAC on RXD[3:0]). At power-up latched as PHYAD[0] of the SMI PHY address. Internal pull-down."+ },+ {+ "number": "23",+ "name": "RXD2/PLLOFF",+ "type": "output",+ "description": "RGMII receive data bit 2. Latched at power-up to configure PLL-off behavior in sleep mode. Internal pull-down."+ },+ {+ "number": "24",+ "name": "RXD1/TXDLY",+ "type": "output",+ "description": "RGMII receive data bit 1. Latched at power-up: pull-up adds delay to TXC for TXD latching (RGMII TX clock timing). Internal pull-down."+ },+ {+ "number": "25",+ "name": "RXD0/RXDLY",+ "type": "output",+ "description": "RGMII receive data bit 0. Latched at power-up: controls RGMII receive clock timing (adds 2 ns delay when RX_CLK=125MHz, 8 ns when RX_CLK=25/2.5MHz). Internal pull-up."+ },+ {+ "number": "26",+ "name": "RX_CTL/PHYAD2",+ "type": "output",+ "description": "RGMII receive control signal to the MAC. Latched at power-up as PHYAD[2]. Internal pull-down."+ },+ {+ "number": "27",+ "name": "RX_CLK/PHYAD1",+ "type": "output",+ "description": "RGMII continuous receive reference clock (125/25/2.5 MHz derived from received data). Latched at power-up as PHYAD[1]. Internal pull-down."+ },+ {+ "number": "28",+ "name": "DVDD_RGMII",+ "type": "power_in",+ "description": "Digital RGMII I/O and MDC/MDIO pad power. Voltage set by CFG_EXT and CFG_LDO[1:0]: 3.3V/2.5V/1.8V from external supply, or from the internal LDO (2.5V/1.8V only). A bulk plus decoupling cap is required regardless of source."+ },+ {+ "number": "29",+ "name": "DVDD33",+ "type": "power_in",+ "description": "3.3V digital non-RGMII I/O power supply."+ },+ {+ "number": "30",+ "name": "LDO_O",+ "type": "power_out",+ "description": "Internal LDO output, 1.1V. On YT8531DH/YT8531DC this pin sources the 1.1V/1.2V core rail; connect to AVDDL (pins 3, 8, 38) and DVDDL (pin 21) with appropriate decoupling."+ },+ {+ "number": "31",+ "name": "INT_N/PME_N",+ "type": "output",+ "description": "Open-drain interrupt / power-management event output. Default is INT_N (active-low level-triggered). Selectable to PME_N (Wake-on-LAN magic-packet event) via EXT 0xA00A bit[6]. Must be pulled up to 3.3V/2.5V/1.8V when used, or left floating."+ },+ {+ "number": "32",+ "name": "LED0/CFG_EXT",+ "type": "output",+ "description": "LED0 output (default: link-up at 10 Mbps solid, activity blink). Latched at power-up as CFG_EXT: pull-up = use external I/O pad power; pull-down = use internal LDO. Internal pull-up."+ },+ {+ "number": "33",+ "name": "LED1/CFG_LDO0",+ "type": "output",+ "description": "LED1 output (default: link-up at 100 Mbps solid, activity blink). Latched at power-up as CFG_LDO[0], setting internal LDO output voltage or external I/O voltage selection together with CFG_LDO1. Internal pull-up."+ },+ {+ "number": "34",+ "name": "LED2/CFG_LDO1",+ "type": "output",+ "description": "LED2 output (default: link-up at 1000 Mbps solid, activity blink). Latched at power-up as CFG_LDO[1]. Together with CFG_LDO0: with CFG_EXT low selects internal LDO = 2.5V/1.8V; with CFG_EXT high selects external I/O = 3.3V/2.5V/1.8V. Internal pull-down."+ },+ {+ "number": "35",+ "name": "CLKOUT",+ "type": "output",+ "description": "25 MHz reference clock output derived from the internal PLL. Also used as the UTP recovery receive clock for Sync-E. Leave floating if unused by the MAC."+ },+ {+ "number": "36",+ "name": "XTAL_I",+ "type": "input",+ "description": "25 MHz crystal input. If driving from an external oscillator/clock on this pin, leave XTAL_O floating. If driving XTAL_O from an external source instead, tie XTAL_I to GND."+ },+ {+ "number": "37",+ "name": "XTAL_O",+ "type": "output",+ "description": "25 MHz crystal output. When driving from an external oscillator/clock on this pin, XTAL_I must be shorted to GND."+ },+ {+ "number": "38",+ "name": "AVDDL",+ "type": "power_in",+ "description": "Analog core power supply, 1.1V/1.2V. Third AVDDL pin; tie to same rail as pins 3 and 8."+ },+ {+ "number": "39",+ "name": "RBIAS",+ "type": "passive",+ "description": "Bias resistor pin. An external 2.49 k\u03a9 \u00b11% resistor must be connected between RBIAS and GND to set the internal bias current."+ },+ {+ "number": "40",+ "name": "AVDD33",+ "type": "power_in",+ "description": "Analog 3.3V power supply (second AVDD33 pin; tie to same rail as pin 11)."+ },+ {+ "number": "41",+ "name": "GND",+ "type": "power_in",+ "description": "Exposed thermal pad on the package underside. Must be soldered to the PCB ground plane for both electrical ground and heat sinking."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/9ce30b61c1d565a37e1fc25cfd944151.pdf",+ "pages": 66,+ "sha256": "57f742224754da8c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Motorcomm",+ "Package": "QFN-40(5x5)",+ "Category": "Interface",+ "Pins": "41"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "yt8531dh-ca"+ ],+ "discovery_pitch": "YT8531DH-CA (Motorcomm) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +336,5 @@ "docs/yt8531dh-ca-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }