← Commit history

yd3082eesa: factory component page (tier=lcsc)

Ray ·51a9a1b60f ·1mo ago ·parent eba031b
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "yd3082eesa",+  "title": "YD3082EESA",+  "brief": "GATEMODE RS-485 / RS-422 ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "GATEMODE RS-485 / RS-422 ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "interface",     "yd3082eesa"   ],+  "component": {+    "mpn": "YD3082EESA",+    "manufacturer": "GATEMODE",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "Interface",+    "subcategory": "RS-485 / RS-422 ICs",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/529aa6c7d9a513a73e846842d3a63826.pdf",+    "parts": {+      "symbol": "yd3082eesa.kicad_sym",+      "footprint": "yd3082eesa.kicad_mod",+      "model_3d": "yd3082eesa.glb",+      "model_3d_step": "yd3082eesa.step",+      "lbr": "yd3082eesa.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "RO",+        "type": "output",+        "description": "Receiver Output. When /RE is low: if (A-B) \u2265 -50mV, RO is logic high; if (A-B) \u2264 -200mV, RO is logic low. VOH \u2265 VCC-1.5V at IO=-4mA; VOL \u2264 0.4V at IO=1mA."+      },+      {+        "number": "2",+        "name": "/RE",+        "type": "input",+        "description": "Receiver Output Enable (active low). Drive /RE low to enable RO; drive /RE high to place RO in high-impedance. Driving /RE high and DE low enters low-power shutdown mode (ISHDN typ 0.1\u00b5A)."+      },+      {+        "number": "3",+        "name": "DE",+        "type": "input",+        "description": "Driver Output Enable (active high). Drive DE high to enable the A/B driver outputs; when DE is low, driver outputs are high-impedance. Driving /RE high and DE low enters low-power shutdown mode."+      },+      {+        "number": "4",+        "name": "DI",+        "type": "input",+        "description": "Driver Input. With DE high, a low on DI forces A (non-inverting) low and B (inverting) high; a high on DI forces A high and B low. VIH=2.0V min, VIL=0.8V max, 100mV typical hysteresis."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device."+      },+      {+        "number": "6",+        "name": "A",+        "type": "bidirectional",+        "description": "Non-inverting Receiver Input and Non-inverting Driver Output (RS-485/RS-422 differential bus line A). \u00b115kV HBM ESD protected. Receiver input voltage \u00b113V, driver output voltage \u00b113V, receiver input impedance 96k\u03a9 (1/8 unit load)."+      },+      {+        "number": "7",+        "name": "B",+        "type": "bidirectional",+        "description": "Inverting Receiver Input and Inverting Driver Output (RS-485/RS-422 differential bus line B). \u00b115kV HBM ESD protected. Receiver input voltage \u00b113V, driver output voltage \u00b113V, receiver input impedance 96k\u03a9 (1/8 unit load)."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply, VCC = 3.0~5.5V. Bypass VCC to GND with a 0.1\u00b5F ceramic capacitor. Absolute maximum +7V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/529aa6c7d9a513a73e846842d3a63826.pdf",+        "pages": 12,+        "sha256": "3e495c65364195a4",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "GATEMODE",+      "Package": "SOP-8",+      "Category": "Interface",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "yd3082eesa"+  ],+  "discovery_pitch": "YD3082EESA (GATEMODE) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/yd3082eesa-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file