XL7660

@@ -0,0 +1,43 @@+# XL7660++**XINLUDA** · DC-DC Converters · SOIC-8++XL7660 from XINLUDA, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOST | input | Frequency Boost input. Tying BOOST to V+ bypasses the internal divide-by-2 counter, raising the oscillator switching frequency (typ. 15 kHz vs 5 kHz at V+ = 5V) to reduce output impedance when smaller capacitors are used. Leave open for normal (divided) operation. |+| 2 | CAP+ | passive | Positive terminal of the external charge-pump 'flying' capacitor C1 (typ. 10 µF electrolytic). Internally driven by the P-channel switch S1 and N-channel switch S2 that alternately connect this node to V+ and GND during each oscillator half-cycle. |+| 3 | GND | power_in | Device ground / 0 V reference. Substrate return for the internal switches S2 and S3 and for the external charge-pump / reservoir capacitors. |+| 4 | CAP- | passive | Negative terminal of the external charge-pump 'flying' capacitor C1. During the transfer half-cycle the internal N-channel switches S3/S4 shift C1's charge onto the reservoir capacitor C2 at VOUT. An external Schottky diode from VOUT to CAP- may be added to guarantee latch-up free operation in some applications. |+| 5 | VOUT | power_out | Negative charge-pump output. Delivers VOUT ≈ -V+ into an external reservoir capacitor C2 (typ. 10 µF). Output source resistance is typ. 55 Ω at V+ = 5V, IOUT = 20 mA. Can also be reconfigured externally as a voltage doubler output. |+| 6 | LV | input | Low-Voltage operation select. Tie LV to GND for supply voltages of 2.0 V to 3.5 V to bypass the internal series regulator and improve low-voltage performance. For V+ from 3.5 V to 10 V leave LV floating (open) to keep the regulator engaged and prevent latch-up. Absolute input range: -0.3 V to V+ + 0.3 V; ILV max 25 µA. |+| 7 | OSC | bidirectional | Oscillator node. Free-running with a nominal 10 kHz frequency at V+ = 5 V when left open (internal ~5 pF plus stray). Adding an external capacitor COSC to GND lowers fOSC; the pin may also be over-driven by an external clock. Input range: (V+ - 5.5 V) to (V+ + 0.3 V) when V+ > 5.5 V. |+| 8 | V+ | power_in | Positive supply input, 2 V to 10 V operating range (absolute max +10.5 V). Powers the oscillator, level translator, internal regulator and the four MOS charge-pump switches. Typical quiescent supply current is 40 µA (no load) at 5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | XINLUDA |+| Package | SOIC-8 |+| Category | PMIC |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `XL7660`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [XINLUDA datasheet](docs/xl7660-datasheet.pdf) (17 pp, sha256 `80e0bc7d028cdd92`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/xl7660-datasheet.pdf)

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