component
XL555
Public Made by Adomby adom
XINLUDA Timers / Clock Oscillators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C521186). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+29−9
page.json+9−7@@ -26,7 +26,9 @@ "model_3d_step": "xl555.step", "lbr": "xl555.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C521186"+ }, "pins": [ { "number": "1",@@ -38,19 +40,19 @@ "number": "2", "name": "TRIG", "type": "input",- "description": "Trigger input. Start of timing input; when TRIG falls below 1/2 CONT (≈1/3 VDD) the internal flip-flop is set, driving OUT high and opening the DISCH transistor. Input current ≈10 pA typical."+ "description": "Trigger input. Start of timing input; when TRIG falls below 1/2 CONT (\u22481/3 VDD) the internal flip-flop is set, driving OUT high and opening the DISCH transistor. Input current \u224810 pA typical." }, { "number": "3", "name": "OUT", "type": "output",- "description": "High-current timer output signal (rail-to-rail CMOS). Sink capability 100 mA (max), source ≈10 mA typical."+ "description": "High-current timer output signal (rail-to-rail CMOS). Sink capability 100 mA (max), source \u224810 mA typical." }, { "number": "4", "name": "RESET", "type": "input",- "description": "Active-low reset input. Overrides all other inputs: when driven low the flip-flop is reset, OUT goes low and DISCH is pulled low. Typical VRESET ≈1.1 V; tie to VDD if unused."+ "description": "Active-low reset input. Overrides all other inputs: when driven low the flip-flop is reset, OUT goes low and DISCH is pulled low. Typical VRESET \u22481.1 V; tie to VDD if unused." }, { "number": "5",@@ -62,19 +64,19 @@ "number": "6", "name": "THRES", "type": "input",- "description": "Threshold (end-of-timing) input. When THRES rises above CONT (≈2/3 VDD) the flip-flop is reset, OUT goes low and DISCH is pulled low. Input current ≈10 pA typical."+ "description": "Threshold (end-of-timing) input. When THRES rises above CONT (\u22482/3 VDD) the flip-flop is reset, OUT goes low and DISCH is pulled low. Input current \u224810 pA typical." }, { "number": "7", "name": "DISCH", "type": "output",- "description": "Discharge. Open-collector/open-drain output used to discharge the external timing capacitor. Saturation voltage ≈50 mV at 1 mA; leakage ≈1 nA typical."+ "description": "Discharge. Open-collector/open-drain output used to discharge the external timing capacitor. Saturation voltage \u224850 mV at 1 mA; leakage \u22481 nA typical." }, { "number": "8", "name": "VDD", "type": "power_in",- "description": "Positive supply, 2 V to 16 V (absolute max 18 V). Typical supply current 120 µA at VDD = 5 V."+ "description": "Positive supply, 2 V to 16 V (absolute max 18 V). Typical supply current 120 \u00b5A at VDD = 5 V." } ], "provenance": {
xl555.lbr+20−2@@ -62,6 +62,18 @@ <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.6000" y="2.4700"/>+ <vertex x="-2.8400" y="2.8000"/>+ <vertex x="-2.3600" y="2.8000"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.9750" y="2.4500"/>+ <vertex x="1.9500" y="2.4500"/>+ <vertex x="1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="1.4750"/>+ </polygon> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/> <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="XL555">@@ -108,7 +120,13 @@ <connect gate="G$1" pin="THRES" pad="6"/> <connect gate="G$1" pin="CONT" pad="5"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="XL555" constant="no"/>+ <attribute name="MANUFACTURER" value="XINLUDA" constant="no"/>+ <attribute name="LCSC_PN" value="C521186" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>