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Initial commit: component/w25q80dvsnig-tr

Ray ·d8009abe35 ·1mo ago
2 files changed +88
README.mdadded+54
@@ -0,0 +1,54 @@+# W25Q80DVSNIG TR++**Winbond** · NOR FLASH · SOIC-8++W25Q80DVSNIG TR from Winbond, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | /CS | input | Active-low SPI Chip Select input. Drive low to enable device access; when high the device is deselected and DO/IO pins are high-Z. /CS must track VCC at power-up (per power-up timing). |+| 2 | DO/IO1 | bidirectional | Standard SPI serial data output (DO); in Dual/Quad SPI modes acts as bidirectional IO1. In Standard/Dual SPI this pin is DO; when QE=1 in Status Register-2 it becomes IO1 for Quad SPI. |+| 3 | /WP/IO2 | bidirectional | Active-low hardware Write Protect input in Standard/Dual SPI, used with the Status Register Block Protect (CMP/SEC/TB/BP2/BP1/BP0) and SRP0 bits. Becomes bidirectional IO2 for Quad SPI when the Quad Enable (QE) bit is set. |+| 4 | GND | power_in | Device ground reference for all logic and I/O signaling. |+| 5 | DI/IO0 | bidirectional | Standard SPI serial data input (DI); latched on rising edge of CLK. In Dual/Quad SPI acts as bidirectional IO0 for command, address, and data phases. |+| 6 | CLK | input | SPI Serial Clock input, up to 104 MHz. Provides timing for serial input/output; data on DI/IOx is latched on rising edge, data on DO/IOx is shifted out on falling edge. |+| 7 | /HOLD/IO3 | bidirectional | Active-low Hold input in Standard/Dual SPI: while /CS is low, driving /HOLD low pauses the device with DO high-Z and DI/CLK ignored. Becomes bidirectional IO3 for Quad SPI when the Quad Enable (QE) bit in Status Register-2 is set. |+| 8 | VCC | power_in | Main power supply, 2.7V to 3.6V single-supply. Decouple with a local bypass capacitor to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Winbond |+| Package | SOIC-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `W25Q80DVSNIG TRSN`+- `W25Q80DVSNIG TRSS`+- `W25Q80DVSNIG TRSV`+- `W25Q80DVSNIG TRZP`+- `W25Q80DVSNIG TRUX`+- `W25Q80DVSNIG TRUXIE`+- `W25Q80DVSNIG TRDA`+- `W25Q80DVSNIG TRBY`++## CAD (KiCad official)++- Symbol: `W25Q80DVSNIG TR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Winbond datasheet](docs/w25q80dvsnig-tr-datasheet.pdf) (71 pp, sha256 `3300ea3e9d2cda4e`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/w25q80dvsnig-tr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "w25q80dvsnig-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "Winbond NOR FLASH, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "w25q80dvsnig tr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "w25q80dvsnig-tr.kicad_sym",+    "w25q80dvsnig-tr.kicad_mod",+    "w25q80dvsnig-tr.glb",+    "w25q80dvsnig-tr.step",+    "w25q80dvsnig-tr.lbr",+    "docs/hero.png",+    "docs/w25q80dvsnig-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file