W25Q512JVFIQ

@@ -0,0 +1,60 @@+# W25Q512JVFIQ++**Winbond Elec** · NOR FLASH · SOIC-16-300mil++W25Q512JVFIQ from Winbond Elec, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | /HOLD or /RESET (IO3) | bidirectional | Hold input in Standard/Dual SPI (active low pauses transactions while /CS is low). Becomes bidirectional IO3 when Quad Enable (QE) bit is set for Quad SPI operation. On ordering suffix -IM this pin functions as /RESET instead of /HOLD. |+| 2 | VCC | power_in | Power supply. Single 2.7 V to 3.6 V supply for the device core and I/O. |+| 3 | /RESET | input | Dedicated hardware reset input, active low. Driving low for ~1 µs terminates any external or internal operation and returns the device to its power-on state. If unused, leave floating or tie to VCC. |+| 4 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 5 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 6 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 7 | /CS | input | SPI Chip Select input, active low. When high the device is deselected and DO/IO0-IO3 are Hi-Z; when low the device is selected for instruction, address, and data transfers. Must track VCC at power-up/down; an external pull-up is recommended. |+| 8 | DO (IO1) | bidirectional | Standard SPI unidirectional data output (DO), clocked on the falling edge of CLK. In Dual/Quad SPI modes this pin is bidirectional IO1. |+| 9 | /WP (IO2) | bidirectional | Write Protect input, active low; used with the Status Register block-protect and SRP bits to hardware-protect regions of the array. When Quad Enable (QE) bit is set, this pin becomes bidirectional IO2 for Quad SPI operation. |+| 10 | GND | power_in | Device ground return. |+| 11 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 12 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 13 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 14 | NC | unconnected | No Connect / Do Not Use. Leave unconnected. |+| 15 | DI (IO0) | bidirectional | Standard SPI unidirectional data input (DI) latched on the rising edge of CLK. In Dual/Quad SPI modes this pin is bidirectional IO0. |+| 16 | CLK | input | SPI Serial Clock input. Provides the timing reference for all serial input/output operations, up to 133 MHz. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Winbond Elec |+| Package | SOIC-16-300mil |+| Category | Memory |+| Pins | 16 |++## Ordering variants++- `W25Q512JVFIQFIQ`+- `W25Q512JVFIQFIM`+- `W25Q512JVFIQEIQ`+- `W25Q512JVFIQEIM`+- `W25Q512JVFIQBIQ`+- `W25Q512JVFIQBIM`++## CAD (KiCad official)++- Symbol: `W25Q512JVFIQ`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Winbond Elec datasheet](docs/w25q512jvfiq-datasheet.pdf) (94 pp, sha256 `16d82bc5b78e5285`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/w25q512jvfiq-datasheet.pdf)

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