W25Q32JVSSIQ

@@ -0,0 +1,66 @@+# W25Q32JVSSIQ++**Winbond Elec** · NOR FLASH · SOIC-8-208mil++W25Q32JVSSIQ from Winbond Elec, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | /CS | input | SPI Chip Select input, active low. Drive low to select the device and clock instructions/data on DI/DO or IO0-IO3; drive high to deselect and place I/O pins in high impedance. Requires a valid high-to-low transition after power-up before any instruction is accepted; a pull-up to VCC is recommended. |+| 2 | DO/IO1 | bidirectional | Standard/Dual SPI serial data output (DO) driven on the falling edge of CLK. In Quad SPI mode (Quad Enable QE=1) this pin becomes bidirectional IO1 for both write and read transfers. |+| 3 | /WP/IO2 | bidirectional | Active-low Write Protect input in standard/Dual SPI mode; when asserted together with the SRP/BP/TB/SEC/CMP bits it hardware-protects part or all of the array and the Status Register. In Quad SPI mode (QE=1) this pin becomes bidirectional IO2. |+| 4 | GND | power_in | Device ground reference. Connect to the system 0 V/GND plane. |+| 5 | DI/IO0 | bidirectional | Standard/Dual SPI serial data input (DI), sampled on the rising edge of CLK for instructions, addresses and data. In Quad SPI mode this pin becomes bidirectional IO0. |+| 6 | CLK | input | SPI serial clock input. Provides the timing reference for all serial input and output operations; supports up to 133 MHz. Data on DI/IOx is latched on the rising edge; DO/IOx is updated on the falling edge. |+| 7 | /HOLD/IO3 | bidirectional | Active-low /HOLD input in standard/Dual SPI mode: while /CS is low, driving /HOLD low pauses the device (DO goes high-Z, DI/CLK are ignored) without deselecting it. In Quad SPI mode (QE=1) the pin is repurposed as bidirectional IO3. Note: on this 8-pin package the pin does NOT provide the dedicated hardware /RESET function (only SOIC-16 and TFBGA packages expose /RESET). |+| 8 | VCC | power_in | Core and I/O supply, 2.7 V to 3.6 V. Decouple with a local ceramic bypass capacitor close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Winbond Elec |+| Package | SOIC-8-208mil |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `W25Q32JVSSIQSSIQ`+- `W25Q32JVSSIQSSIG`+- `W25Q32JVSSIQSNIQ`+- `W25Q32JVSSIQSNIG`+- `W25Q32JVSSIQSTIQ`+- `W25Q32JVSSIQSTIG`+- `W25Q32JVSSIQZPIQ`+- `W25Q32JVSSIQZPIG`+- `W25Q32JVSSIQZEIQ`+- `W25Q32JVSSIQZEIG`+- `W25Q32JVSSIQXGIQ`+- `W25Q32JVSSIQXGIG`+- `W25Q32JVSSIQSFIQ`+- `W25Q32JVSSIQSFIG`+- `W25Q32JVSSIQDAIQ`+- `W25Q32JVSSIQDAIG`+- `W25Q32JVSSIQTBIQ`+- `W25Q32JVSSIQTBIG`+- `W25Q32JVSSIQTCIQ`+- `W25Q32JVSSIQTCIG`++## CAD (KiCad official)++- Symbol: `W25Q32JVSSIQ`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-208mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Winbond Elec datasheet](docs/w25q32jvssiq-datasheet.pdf) (80 pp, sha256 `a835e8ae41ea71e9`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/w25q32jvssiq-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "w25q32jvssiq",+  "version": "0.1.0",+  "type": "component",+  "description": "Winbond Elec NOR FLASH, SOIC-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "w25q32jvssiq"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "w25q32jvssiq.kicad_sym",+    "w25q32jvssiq.kicad_mod",+    "w25q32jvssiq.glb",+    "w25q32jvssiq.step",+    "w25q32jvssiq.lbr",+    "docs/hero.png",+    "docs/w25q32jvssiq-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file