component
vrh1202ltx
Public Made by Adomby adom
AnaSem Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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vrh1202ltx: restore the component block (pinout + model declarations) from this page's own README and symbol
1 file changed
+56−1
page.json+56−1@@ -33,5 +33,60 @@ "author": { "name": "Ray", "email": "[email protected]"+ },+ "component": {+ "mpn": "VRH1202LTX",+ "manufacturer": "AnaSem",+ "package": "SOT-23-5",+ "pin_count": 5,+ "category": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "parts": {+ "symbol": "vrh1202ltx.kicad_sym",+ "footprint": "vrh1202ltx.kicad_mod",+ "model_3d": "vrh1202ltx-etched.glb",+ "model_3d_plain": "vrh1202ltx.glb",+ "model_3d_step": "vrh1202ltx-etched.step",+ "model_3d_step_plain": "vrh1202ltx.step",+ "lbr": "vrh1202ltx.lbr"+ },+ "pins": [+ {+ "number": "1",+ "name": "VIN",+ "type": "power_in",+ "description": "Voltage input pin. Operating range 1.6V to 6.0V (absolute maximum -0.3V to +7.0V). A 1.0µF ceramic input capacitor (CIN) should be connected between VIN and VSS for stable input power."+ },+ {+ "number": "2",+ "name": "VSS",+ "type": "power_in",+ "description": "Power ground / device reference (0V). Common return for input, output and EN circuitry."+ },+ {+ "number": "3",+ "name": "EN",+ "type": "input",+ "description": "Chip enable / shutdown input. VENH ≥ 1.2V (max 6.0V) enables the regulator; VENL ≤ 0.3V puts the device in shutdown, turning off the pass P-MOSFET and engaging the CL auto-discharge (RDIS ≈ 160Ω) to rapidly pull VOUT to VSS. Input current typ. sub-µA (IENH 0.25-5.0µA at VEN=5V, IENL ±0.1µA)."+ },+ {+ "number": "4",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. Leave open (or may be tied to VSS for mechanical support) - do not connect to any signal."+ },+ {+ "number": "5",+ "name": "VOUT",+ "type": "power_out",+ "description": "Regulated voltage output. Fixed 1.20V (±20mV) at up to 250mA; requires a ≥1.0µF low-ESR ceramic output capacitor (CL) between VOUT and VSS as close as possible for phase compensation. Built-in over-current limit (≥300mA) and short-circuit current typ. 40mA. VOUT must not exceed VIN+0.3V to avoid parasitic-diode inverse current."+ }+ ],+ "provenance": {+ "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ } }-}+}