← Commit history

Publish 0.2.0

Ray ·9f44aaf2a7 · ·parent 438986c
3 files changed +25−8
README.md+14
@@ -38,6 +38,20 @@ VIPER12ADIP-E from STMicroelectronics, in a DIP-8. Pinout and pin descriptions e - Footprint: `Package_DIP:DIP-8_W7.62mm` - 3D model: DIP-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`viper12adip-e.step`](viper12adip-e.step) | 271 KB | You want the bare part, or you mark your own boards. |+| [`viper12adip-e-etched.step`](viper12adip-e-etched.step) | 2.0 MB | You want the part with `VIPER12ADIP-E` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 515 faces against 148 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "viper12adip-e",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "STMicroelectronics AC-DC Controllers and Regulators, DIP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+10−7
@@ -4,7 +4,7 @@   "slug": "viper12adip-e",   "title": "VIPER12ADIP-E",   "brief": "STMicroelectronics AC-DC Controllers and Regulators, DIP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -46,7 +46,7 @@         "number": "3",         "name": "FB",         "type": "input",-        "description": "Feedback input. Useful voltage range 0 V to 1 V; sets the peak drain MOSFET current. Current limitation (maximum drain current, IDlim typ 0.4 A) is obtained by shorting FB to SOURCE. FB pin input impedance ~1.2 k\u03a9; IFB max 3 mA."+        "description": "Feedback input. Useful voltage range 0 V to 1 V; sets the peak drain MOSFET current. Current limitation (maximum drain current, IDlim typ 0.4 A) is obtained by shorting FB to SOURCE. FB pin input impedance ~1.2 kΩ; IFB max 3 mA."       },       {         "number": "4",@@ -58,7 +58,7 @@         "number": "5",         "name": "DRAIN",         "type": "power_out",-        "description": "Power MOSFET drain. Also used by the internal high-voltage start-up current source to charge the external VDD capacitor. Switching drain-source rating 730 V; rDS(on) typ 27 \u03a9. Pins 5-8 are internally connected together."+        "description": "Power MOSFET drain. Also used by the internal high-voltage start-up current source to charge the external VDD capacitor. Switching drain-source rating 730 V; rDS(on) typ 27 Ω. Pins 5-8 are internally connected together."       },       {         "number": "6",@@ -102,8 +102,8 @@     "pin1": {       "pad": "1",       "at": [-        0.0,-        0.0+        0,+        0       ],       "corner": "bottom-right",       "source": "fab-chamfer",@@ -150,6 +150,9 @@     "docs/hero.png",     "docs/viper12adip-e-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"-  ]+    "viewers/footprint.html",+    "pads.json"+  ],+  "description": "STMicroelectronics AC-DC Controllers and Regulators, DIP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "visibility": "public" }\ No newline at end of file