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Initial commit: component/ulq2003d1013try

Ray ·77272bb14a ·6d ago
2 files changed +243
README.mdadded+52
@@ -0,0 +1,52 @@+# ULQ2003D1013TRY++**STMicroelectronics** · Darlington Transistor Arrays · SOIC-16++ULQ2003D1013TRY from STMicroelectronics, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN1 | input | Darlington channel 1 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 2 | IN2 | input | Darlington channel 2 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 3 | IN3 | input | Darlington channel 3 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 4 | IN4 | input | Darlington channel 4 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 5 | IN5 | input | Darlington channel 5 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 6 | IN6 | input | Darlington channel 6 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 7 | IN7 | input | Darlington channel 7 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V. |+| 8 | GND | power_in | Common emitter ground return for all seven Darlington pairs; connect to system ground. |+| 9 | COM | power_in | Common cathode bus of the seven integrated freewheeling suppression diodes for inductive loads; connect to positive supply rail (max 50 V, forward voltage 1.7-2.0 V at IF = 350 mA). |+| 10 | OUT7 | output | Open-collector Darlington output for channel 7; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |+| 11 | OUT6 | output | Open-collector Darlington output for channel 6; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |+| 12 | OUT5 | output | Open-collector Darlington output for channel 5; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |+| 13 | OUT4 | output | Open-collector Darlington output for channel 4; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |+| 14 | OUT3 | output | Open-collector Darlington output for channel 3; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |+| 15 | OUT2 | output | Open-collector Darlington output for channel 2; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |+| 16 | OUT1 | output | Open-collector Darlington output for channel 1; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-16 |+| Category | Transistors/Thyristors |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ULQ2003D1013TRY`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `ulq2003d1013try-etched.step` / `ulq2003d1013try-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ulq2003d1013try.step` / `ulq2003d1013try.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588901493830901760) (14 pp, sha256 `5b76cfd5a2b38468`, retrieved 2026-09-29, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ulq2003d1013try-datasheet.pdf)
page.jsonadded+191
@@ -0,0 +1,191 @@+{+  "slug": "ulq2003d1013try",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Darlington Transistor Arrays, SOIC-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "ulq2003d1013try",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ulq2003d1013try.kicad_sym",+    "ulq2003d1013try.kicad_mod",+    "ulq2003d1013try.glb",+    "ulq2003d1013try.step",+    "ulq2003d1013try.lbr",+    "docs/hero.png",+    "docs/ulq2003d1013try-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ULQ2003D1013TRY",+    "manufacturer": "STMicroelectronics",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Transistors/Thyristors",+    "subcategory": "Darlington Transistor Arrays",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588901493830901760",+    "parts": {+      "symbol": "ulq2003d1013try.kicad_sym",+      "footprint": "ulq2003d1013try.kicad_mod",+      "model_3d": "ulq2003d1013try-etched.glb",+      "model_3d_plain": "ulq2003d1013try.glb",+      "model_3d_step": "ulq2003d1013try-etched.step",+      "model_3d_step_plain": "ulq2003d1013try.step",+      "lbr": "ulq2003d1013try.lbr"+    },+    "distributor_links": {+      "lcsc": "C194177",+      "digikey": "497-10282-2-ND",+      "mouser": "511-ULQ2003D1013TRY"+    },+    "distributor_check": {+      "checked_at": "2026-09-29T23:26:58Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-10282-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-ULQ2003D1013TRY",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "IN1",+        "type": "input",+        "description": "Darlington channel 1 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "2",+        "name": "IN2",+        "type": "input",+        "description": "Darlington channel 2 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "3",+        "name": "IN3",+        "type": "input",+        "description": "Darlington channel 3 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "4",+        "name": "IN4",+        "type": "input",+        "description": "Darlington channel 4 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "5",+        "name": "IN5",+        "type": "input",+        "description": "Darlington channel 5 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "6",+        "name": "IN6",+        "type": "input",+        "description": "Darlington channel 6 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "7",+        "name": "IN7",+        "type": "input",+        "description": "Darlington channel 7 TTL/CMOS-compatible base input (5 V TTL for ULQ2003); input voltage max 30 V, typical ON input current 0.93-1.35 mA at VI = 3.85 V."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Common emitter ground return for all seven Darlington pairs; connect to system ground."+      },+      {+        "number": "9",+        "name": "COM",+        "type": "power_in",+        "description": "Common cathode bus of the seven integrated freewheeling suppression diodes for inductive loads; connect to positive supply rail (max 50 V, forward voltage 1.7-2.0 V at IF = 350 mA)."+      },+      {+        "number": "10",+        "name": "OUT7",+        "type": "output",+        "description": "Open-collector Darlington output for channel 7; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      },+      {+        "number": "11",+        "name": "OUT6",+        "type": "output",+        "description": "Open-collector Darlington output for channel 6; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      },+      {+        "number": "12",+        "name": "OUT5",+        "type": "output",+        "description": "Open-collector Darlington output for channel 5; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      },+      {+        "number": "13",+        "name": "OUT4",+        "type": "output",+        "description": "Open-collector Darlington output for channel 4; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      },+      {+        "number": "14",+        "name": "OUT3",+        "type": "output",+        "description": "Open-collector Darlington output for channel 3; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      },+      {+        "number": "15",+        "name": "OUT2",+        "type": "output",+        "description": "Open-collector Darlington output for channel 2; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      },+      {+        "number": "16",+        "name": "OUT1",+        "type": "output",+        "description": "Open-collector Darlington output for channel 1; 500 mA continuous (600 mA peak), max VCE 50 V, VCE(sat) 1.3-1.6 V at IC = 350 mA."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588901493830901760",+        "pages": 14,+        "sha256": "5b76cfd5a2b38468",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file