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Initial commit: component/uln2003acm

Ray ·68831a00d7 ·6d ago
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README.mdadded+53
@@ -0,0 +1,53 @@+# ULN2003ACM++**HGSEMI** · Darlington Transistor Arrays · SOP-16++ULN2003ACM from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1B | input | Input 1: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 2 | 2B | input | Input 2: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 3 | 3B | input | Input 3: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 4 | 4B | input | Input 4: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 5 | 5B | input | Input 5: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 6 | 6B | input | Input 6: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 7 | 7B | input | Input 7: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V. |+| 8 | GND | power_in | Common emitter ground return for all seven Darlington output stages. |+| 9 | COM | power_in | Flyback-suppression diode common cathode; connect to load supply (up to 50 V) to clamp inductive-load transients; diode VF = 1.7-2.0 V at IF = 350 mA. |+| 10 | 7C | output | Output 7: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |+| 11 | 6C | output | Output 6: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |+| 12 | 5C | output | Output 5: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |+| 13 | 4C | output | Output 4: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |+| 14 | 3C | output | Output 3: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |+| 15 | 2C | output | Output 2: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |+| 16 | 1C | output | Output 1: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HGSEMI |+| Package | SOP-16 |+| Category | Transistors/Thyristors |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ULN2003ACM`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOP-16 (KiCad packages3D, STEP)+- 3D model files: `uln2003acm-etched.step` / `uln2003acm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uln2003acm.step` / `uln2003acm.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758075323617689600) (9 pp, sha256 `91521ebac52846fe`, retrieved 2026-09-29, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/uln2003acm-datasheet.pdf)
page.jsonadded+188
@@ -0,0 +1,188 @@+{+  "slug": "uln2003acm",+  "version": "0.1.0",+  "type": "component",+  "description": "HGSEMI Darlington Transistor Arrays, SOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "uln2003acm",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "uln2003acm.kicad_sym",+    "uln2003acm.kicad_mod",+    "uln2003acm.glb",+    "uln2003acm.step",+    "uln2003acm.lbr",+    "docs/hero.png",+    "docs/uln2003acm-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ULN2003ACM",+    "manufacturer": "HGSEMI",+    "package": "SOP-16",+    "pin_count": 16,+    "category": "Transistors/Thyristors",+    "subcategory": "Darlington Transistor Arrays",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758075323617689600",+    "parts": {+      "symbol": "uln2003acm.kicad_sym",+      "footprint": "uln2003acm.kicad_mod",+      "model_3d": "uln2003acm-etched.glb",+      "model_3d_plain": "uln2003acm.glb",+      "model_3d_step": "uln2003acm-etched.step",+      "model_3d_step_plain": "uln2003acm.step",+      "lbr": "uln2003acm.lbr"+    },+    "distributor_links": {+      "lcsc": "C910869"+    },+    "distributor_check": {+      "checked_at": "2026-09-29T16:56:00Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1B",+        "type": "input",+        "description": "Input 1: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "2",+        "name": "2B",+        "type": "input",+        "description": "Input 2: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "3",+        "name": "3B",+        "type": "input",+        "description": "Input 3: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "4",+        "name": "4B",+        "type": "input",+        "description": "Input 4: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "5",+        "name": "5B",+        "type": "input",+        "description": "Input 5: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "6",+        "name": "6B",+        "type": "input",+        "description": "Input 6: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "7",+        "name": "7B",+        "type": "input",+        "description": "Input 7: NPN Darlington base input with 2.7 kΩ series resistor; TTL/CMOS compatible, VI(ON) 2.4-3.0 V, input voltage range −0.3 V to 30 V."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Common emitter ground return for all seven Darlington output stages."+      },+      {+        "number": "9",+        "name": "COM",+        "type": "power_in",+        "description": "Flyback-suppression diode common cathode; connect to load supply (up to 50 V) to clamp inductive-load transients; diode VF = 1.7-2.0 V at IF = 350 mA."+      },+      {+        "number": "10",+        "name": "7C",+        "type": "output",+        "description": "Output 7: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      },+      {+        "number": "11",+        "name": "6C",+        "type": "output",+        "description": "Output 6: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      },+      {+        "number": "12",+        "name": "5C",+        "type": "output",+        "description": "Output 5: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      },+      {+        "number": "13",+        "name": "4C",+        "type": "output",+        "description": "Output 4: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      },+      {+        "number": "14",+        "name": "3C",+        "type": "output",+        "description": "Output 3: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      },+      {+        "number": "15",+        "name": "2C",+        "type": "output",+        "description": "Output 2: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      },+      {+        "number": "16",+        "name": "1C",+        "type": "output",+        "description": "Output 1: open-collector NPN Darlington; max VCEO = 50 V, IC(continuous) = 500 mA, VCE(sat) = 1.3 V max at IC = 350 mA / IB = 500 µA."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758075323617689600",+        "pages": 9,+        "sha256": "91521ebac52846fe",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file