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UCD3138RHAT
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Texas Instruments Supervisor And Reset ICs, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+78@@ -0,0 +1,78 @@+# UCD3138RHAT++**Texas Instruments** · Supervisor And Reset ICs · VQFN-40-EP(6x6)++UCD3138RHAT from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | AGND | power_in | Analog ground reference for differential error ADC and analog circuitry |+| 2 | AD13 | input | 12-bit ADC channel 13 input; connected to comparator E for current-sharing DAC output selection |+| 3 | AD06 | input | 12-bit ADC channel 6 input; connected to comparator F for DAC output selection |+| 4 | AD04 | input | 12-bit ADC channel 4 input; connected to comparator D for DAC output selection |+| 5 | AD03 | input | 12-bit ADC channel 3 input; connected to comparators B and C for overvoltage/undervoltage protection |+| 6 | DGND | power_in | Digital ground reference for digital circuitry and logic |+| 7 | /RESET | input | Device reset input, active-low; device resets when this pin is pulled below threshold |+| 8 | ADC_EXT_TRIG | input | External ADC conversion trigger input; multiplexed with TCAP, SYNC, and PWM0 functions |+| 9 | PMBUS_CLK | tri_state | Open-drain PMBus/I2C clock line; can be configured as SCI_TX0 UART output |+| 10 | PMBUS_DATA | tri_state | Open-drain PMBus/I2C data line; can be configured as SCI_RX0 UART input |+| 11 | DPWM0A | output | Digital PWM output 0A with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 12 | DPWM0B | output | Digital PWM output 0B with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 13 | DPWM1A | output | Digital PWM output 1A with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 14 | DPWM1B | output | Digital PWM output 1B with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 15 | DPWM2A | output | Digital PWM output 2A with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 16 | DPWM2B | output | Digital PWM output 2B with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 17 | DPWM3A | output | Digital PWM output 3A with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 18 | DPWM3B | output | Digital PWM output 3B with 250ps pulse-width resolution; supports up to 2MHz switching frequency |+| 19 | PMBUS_ALERT | tri_state | Open-drain PMBus alert signal output; configurable as general-purpose GPIO |+| 20 | PMBUS_CTRL | tri_state | Open-drain PMBus control signal line; configurable as general-purpose GPIO |+| 21 | TCK | input | JTAG test clock input for debugging or manufacturer test; multiplexed with TCAP, SYNC, and PWM0 |+| 22 | TDO | output | JTAG test data output for debugging; can be configured as SCI_TX0, PMBUS_ALERT, or FAULT0 |+| 23 | TDI | input | JTAG test data input for debugging; can be configured as SCI_RX0, PMBUS_CTRL, or FAULT1 |+| 24 | TMS | input | JTAG test mode select input for debugging or manufacturer test; configurable as GPIO |+| 25 | FAULT2 | input | External fault input 2; detects external fault conditions for protection |+| 26 | DGND | power_in | Digital ground reference for digital circuitry and logic |+| 27 | V33D | power_in | Digital 3.3V core supply input; nominal 3.3V with recommended 4.7µF and 10nF bypass capacitors |+| 28 | BP18 | power_in | 1.8V bypass pin for internal regulator; requires 1µF and 10nF bypass capacitors to ground |+| 29 | AGND | power_in | Substrate analog ground reference; connected to internal silicon substrate |+| 30 | AGND | power_in | Analog ground reference for differential error ADC and analog circuitry |+| 31 | EAP0 | input | Error ADC channel 0 positive input; positive terminal of differential feedback measurement for loop 0 |+| 32 | EAN0 | input | Error ADC channel 0 negative input; negative terminal of differential feedback measurement for loop 0 |+| 33 | EAP1 | input | Error ADC channel 1 positive input; positive terminal of differential feedback measurement for loop 1 |+| 34 | EAN1 | input | Error ADC channel 1 negative input; negative terminal of differential feedback measurement for loop 1 |+| 35 | EAP2 | input | Error ADC channel 2 positive input; recommended for peak current mode control applications; positive terminal of differential measurement for loop 2 |+| 36 | AGND | power_in | Analog ground reference for differential error ADC and analog circuitry |+| 37 | V33A | power_in | Analog 3.3V supply input; powers analog circuitry with internal regulator; requires 4.7µF and 10nF bypass capacitors |+| 38 | AD00 | input | 12-bit ADC channel 0 input; connected to internal current source for PMBus address detection |+| 39 | AD01 | input | 12-bit ADC channel 1 input; connected to internal current source for PMBus address detection |+| 40 | AD02 | input | 12-bit ADC channel 2 input; connected to comparator A for current-sharing bus monitoring |+| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-40-EP(6x6) |+| Category | Power Management (PMIC) |+| Pins | 41 |++## CAD (KiCad official)++- Symbol: `UCD3138RHAT`+- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`+- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)+- 3D model files: `ucd3138rhat-etched.step` / `ucd3138rhat-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucd3138rhat.step` / `ucd3138rhat.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucd3138) (102 pp, sha256 `5ebcb7f0fa3d9854`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucd3138rhat-datasheet.pdf)
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connected to comparator E for current-sharing DAC output selection"+ },+ {+ "number": "3",+ "name": "AD06",+ "type": "input",+ "description": "12-bit ADC channel 6 input; connected to comparator F for DAC output selection"+ },+ {+ "number": "4",+ "name": "AD04",+ "type": "input",+ "description": "12-bit ADC channel 4 input; connected to comparator D for DAC output selection"+ },+ {+ "number": "5",+ "name": "AD03",+ "type": "input",+ "description": "12-bit ADC channel 3 input; connected to comparators B and C for overvoltage/undervoltage protection"+ },+ {+ "number": "6",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference for digital circuitry and logic"+ },+ {+ "number": "7",+ "name": "/RESET",+ "type": "input",+ "description": "Device reset input, active-low; device resets when this pin is pulled below threshold"+ },+ {+ "number": "8",+ "name": "ADC_EXT_TRIG",+ "type": "input",+ "description": "External ADC conversion trigger input; multiplexed with TCAP, SYNC, and PWM0 functions"+ },+ {+ "number": "9",+ "name": "PMBUS_CLK",+ "type": "tri_state",+ "description": "Open-drain PMBus/I2C clock line; can be configured as SCI_TX0 UART output"+ },+ {+ "number": "10",+ "name": "PMBUS_DATA",+ "type": "tri_state",+ "description": "Open-drain PMBus/I2C data line; can be configured as SCI_RX0 UART input"+ },+ {+ "number": "11",+ "name": "DPWM0A",+ "type": "output",+ "description": "Digital PWM output 0A with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "12",+ "name": "DPWM0B",+ "type": "output",+ "description": "Digital PWM output 0B with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "13",+ "name": "DPWM1A",+ "type": "output",+ "description": "Digital PWM output 1A with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "14",+ "name": "DPWM1B",+ "type": "output",+ "description": "Digital PWM output 1B with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "15",+ "name": "DPWM2A",+ "type": "output",+ "description": "Digital PWM output 2A with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "16",+ "name": "DPWM2B",+ "type": "output",+ "description": "Digital PWM output 2B with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "17",+ "name": "DPWM3A",+ "type": "output",+ "description": "Digital PWM output 3A with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "18",+ "name": "DPWM3B",+ "type": "output",+ "description": "Digital PWM output 3B with 250ps pulse-width resolution; supports up to 2MHz switching frequency"+ },+ {+ "number": "19",+ "name": "PMBUS_ALERT",+ "type": "tri_state",+ "description": "Open-drain PMBus alert signal output; configurable as general-purpose GPIO"+ },+ {+ "number": "20",+ "name": "PMBUS_CTRL",+ "type": "tri_state",+ "description": "Open-drain PMBus control signal line; configurable as general-purpose GPIO"+ },+ {+ "number": "21",+ "name": "TCK",+ "type": "input",+ "description": "JTAG test clock input for debugging or manufacturer test; multiplexed with TCAP, SYNC, and PWM0"+ },+ {+ "number": "22",+ "name": "TDO",+ "type": "output",+ "description": "JTAG test data output for debugging; can be configured as SCI_TX0, PMBUS_ALERT, or FAULT0"+ },+ {+ "number": "23",+ "name": "TDI",+ "type": "input",+ "description": "JTAG test data input for debugging; can be configured as SCI_RX0, PMBUS_CTRL, or FAULT1"+ },+ {+ "number": "24",+ "name": "TMS",+ "type": "input",+ "description": "JTAG test mode select input for debugging or manufacturer test; configurable as GPIO"+ },+ {+ "number": "25",+ "name": "FAULT2",+ "type": "input",+ "description": "External fault input 2; detects external fault conditions for protection"+ },+ {+ "number": "26",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference for digital circuitry and logic"+ },+ {+ "number": "27",+ "name": "V33D",+ "type": "power_in",+ "description": "Digital 3.3V core supply input; nominal 3.3V with recommended 4.7µF and 10nF bypass capacitors"+ },+ {+ "number": "28",+ "name": "BP18",+ "type": "power_in",+ "description": "1.8V bypass pin for internal regulator; requires 1µF and 10nF bypass capacitors to ground"+ },+ {+ "number": "29",+ "name": "AGND",+ "type": "power_in",+ "description": "Substrate analog ground reference; connected to internal silicon substrate"+ },+ {+ "number": "30",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference for differential error ADC and analog circuitry"+ },+ {+ "number": "31",+ "name": "EAP0",+ "type": "input",+ "description": "Error ADC channel 0 positive input; positive terminal of differential feedback measurement for loop 0"+ },+ {+ "number": "32",+ "name": "EAN0",+ "type": "input",+ "description": "Error ADC channel 0 negative input; negative terminal of differential feedback measurement for loop 0"+ },+ {+ "number": "33",+ "name": "EAP1",+ "type": "input",+ "description": "Error ADC channel 1 positive input; positive terminal of differential feedback measurement for loop 1"+ },+ {+ "number": "34",+ "name": "EAN1",+ "type": "input",+ "description": "Error ADC channel 1 negative input; negative terminal of differential feedback measurement for loop 1"+ },+ {+ "number": "35",+ "name": "EAP2",+ "type": "input",+ "description": "Error ADC channel 2 positive input; recommended for peak current mode control applications; positive terminal of differential measurement for loop 2"+ },+ {+ "number": "36",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference for differential error ADC and analog circuitry"+ },+ {+ "number": "37",+ "name": "V33A",+ "type": "power_in",+ "description": "Analog 3.3V supply input; powers analog circuitry with internal regulator; requires 4.7µF and 10nF bypass capacitors"+ },+ {+ "number": "38",+ "name": "AD00",+ "type": "input",+ "description": "12-bit ADC channel 0 input; connected to internal current source for PMBus address detection"+ },+ {+ "number": "39",+ "name": "AD01",+ "type": "input",+ "description": "12-bit ADC channel 1 input; connected to internal current source for PMBus address detection"+ },+ {+ "number": "40",+ "name": "AD02",+ "type": "input",+ "description": "12-bit ADC channel 2 input; connected to comparator A for current-sharing bus monitoring"+ },+ {+ "number": "41",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 41 added from the footprint"+ ],+ "pages_sent": 34,+ "cost_usd": 0.2637,+ "at": "2026-10-07T02:37:51"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucd3138",+ "pages": 102,+ "sha256": "5ebcb7f0fa3d9854",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucd3138rhat.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 6,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucd3138rhat-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 6,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "42e68a76b14d374967ef488ebb34c07ceb10fd95dffb5f5927ba38c94d7008b3",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}