component
UCC38C41DR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# UCC38C41DR++**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8++UCC38C41DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | COMP | output | Error amplifier output for loop compensation, internally current limited so that zero duty cycle can be commanded by forcing COMP to GND, with a 10 mA maximum sink current rating. |+| 2 | FB | input | Inverting input of the error amplifier, whose non-inverting input is internally trimmed to 2.5 V ±1%. |+| 3 | CS | input | Primary-side current sense input to the PWM comparator, connected to the MOSFET source sense resistor, with a typical current sense amplifier gain of 3 V/V and an RC filter that may be needed against leading-edge noise. |+| 4 | RT/CT | bidirectional | Oscillator set point, where timing resistor RRT is connected to VREF and timing capacitor CCT to GND to set the switching frequency, with the maximum operating frequency stated as 1 MHz. |+| 5 | GND | power_in | Ground return pin for the output driver stage and the logic-level controller section, to which all voltages are referenced. |+| 6 | OUT | output | Totem-pole drive output intended to drive a MOSFET directly, sourcing and sinking up to 1 A peak; on the UCC38C41 the output runs at one-half the oscillator frequency, limiting maximum duty cycle to less than 50%. |+| 7 | VDD | power_in | Power input for the device with an absolute maximum of 20 V, requiring a 0.1 µF ceramic bypass capacitor to GND placed as close as possible to the pin. |+| 8 | VREF | power_in | 5 V reference output (±1% tolerance) that must be bypassed to GND with a ceramic capacitor of at least 0.1 µF placed close to the pin, with a 55 mA maximum short-circuit current. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC38C41DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc38c41dr-etched.step` / `ucc38c41dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc38c41dr.step` / `ucc38c41dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ucc38c41.pdf) (60 pp, sha256 `9fa55f996731c56b`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc38c41dr-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "ucc38c41dr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "ucc38c41dr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucc38c41dr.kicad_sym",+ "ucc38c41dr.kicad_mod",+ "ucc38c41dr.glb",+ "ucc38c41dr.step",+ "ucc38c41dr.lbr",+ "docs/hero.png",+ "docs/ucc38c41dr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucc38c41dr-hero.glb",+ "ucc38c41dr-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCC38C41DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "AC-DC Controllers And Regulators",+ "datasheet": "https://www.ti.com/lit/ds/symlink/ucc38c41.pdf",+ "parts": {+ "symbol": "ucc38c41dr.kicad_sym",+ "footprint": "ucc38c41dr.kicad_mod",+ "model_3d": "ucc38c41dr-hero.glb",+ "model_3d_plain": "ucc38c41dr.glb",+ "model_3d_step": "ucc38c41dr-etched.step",+ "model_3d_step_plain": "ucc38c41dr.step",+ "lbr": "ucc38c41dr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2864933",+ "digikey": "296-UCC38C41DRTR-ND",+ "mouser": "595-UCC38C41DR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T20:15:24Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-UCC38C41DRTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-UCC38C41DR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output for loop compensation, internally current limited so that zero duty cycle can be commanded by forcing COMP to GND, with a 10 mA maximum sink current rating."+ },+ {+ "number": "2",+ "name": "FB",+ "type": "input",+ "description": "Inverting input of the error amplifier, whose non-inverting input is internally trimmed to 2.5 V ±1%."+ },+ {+ "number": "3",+ "name": "CS",+ "type": "input",+ "description": "Primary-side current sense input to the PWM comparator, connected to the MOSFET source sense resistor, with a typical current sense amplifier gain of 3 V/V and an RC filter that may be needed against leading-edge noise."+ },+ {+ "number": "4",+ "name": "RT/CT",+ "type": "bidirectional",+ "description": "Oscillator set point, where timing resistor RRT is connected to VREF and timing capacitor CCT to GND to set the switching frequency, with the maximum operating frequency stated as 1 MHz."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return pin for the output driver stage and the logic-level controller section, to which all voltages are referenced."+ },+ {+ "number": "6",+ "name": "OUT",+ "type": "output",+ "description": "Totem-pole drive output intended to drive a MOSFET directly, sourcing and sinking up to 1 A peak; on the UCC38C41 the output runs at one-half the oscillator frequency, limiting maximum duty cycle to less than 50%."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Power input for the device with an absolute maximum of 20 V, requiring a 0.1 µF ceramic bypass capacitor to GND placed as close as possible to the pin."+ },+ {+ "number": "8",+ "name": "VREF",+ "type": "power_in",+ "description": "5 V reference output (±1% tolerance) that must be bypassed to GND with a ceramic capacitor of at least 0.1 µF placed close to the pin, with a 55 mA maximum short-circuit current."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The MPN UCC38C41DR is listed in the package addendum (page 45) as SOIC (D), 8 pins, so the pinout is; Pin types are mapped from the datasheet's Table 5-1 (I/O/G) to KiCad ERC classes. VDD is listed as '"+ ],+ "pages_sent": 15,+ "cost_usd": 0.0993,+ "at": "2026-10-08T20:14:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/ucc38c41.pdf",+ "pages": 60,+ "sha256": "9fa55f996731c56b",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucc38c41dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucc38c41dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "4c4599c05119a0b565b6e328bf8fe04ebe26c8c548a09918948c07bafc00d26a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}