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Set visibility: public

Ray ·12263629e0 ·2mo ago ·parent d30d1ed
1 file changed +10−7
page.json+10−7
@@ -32,19 +32,19 @@         "number": "1",         "name": "COMP",         "type": "output",-        "description": "Error-amplifier output for loop compensation. Also used as a control port for opto-isolated secondary-side feedback; internally current-limited so pulling COMP to GND forces zero duty cycle. VOH \u2248 VREF\u22120.2 V; VOL \u2248 0.1 V (typ)."+        "description": "Error-amplifier output for loop compensation. Also used as a control port for opto-isolated secondary-side feedback; internally current-limited so pulling COMP to GND forces zero duty cycle. VOH ≈ VREF−0.2 V; VOL ≈ 0.1 V (typ)."       },       {         "number": "2",         "name": "FB",         "type": "input",-        "description": "Inverting input to the internal error amplifier. Non-inverting input is trimmed internally to 2.5 V \u00b11%; drive FB from the converter output feedback divider to close the voltage loop."+        "description": "Inverting input to the internal error amplifier. Non-inverting input is trimmed internally to 2.5 V ±1%; drive FB from the converter output feedback divider to close the voltage loop."       },       {         "number": "3",         "name": "CS",         "type": "input",-        "description": "Primary-side current-sense input to the PWM comparator (non-inverting). Connect to a current-sense resistor; the PWM comparator terminates OUT when CS exceeds the COMP-derived threshold (COMP-to-CS offset \u2248 1.15 V, current-sense gain \u2248 3 V/V). Max input signal 1 V typ."+        "description": "Primary-side current-sense input to the PWM comparator (non-inverting). Connect to a current-sense resistor; the PWM comparator terminates OUT when CS exceeds the COMP-derived threshold (COMP-to-CS offset ≈ 1.15 V, current-sense gain ≈ 3 V/V). Max input signal 1 V typ."       },       {         "number": "4",@@ -62,19 +62,19 @@         "number": "6",         "name": "OUT",         "type": "output",-        "description": "Totem-pole gate-drive output intended to directly drive an external MOSFET. Peak source/sink capability \u00b11 A (200 mA continuous), rise/fall ~25 ns / 20 ns into 1 nF. For UCC28C45 an internal T flip-flop halves the oscillator frequency, limiting maximum duty cycle to <50%. OUT is actively held low when VDD is below the UVLO turn-on threshold."+        "description": "Totem-pole gate-drive output intended to directly drive an external MOSFET. Peak source/sink capability ±1 A (200 mA continuous), rise/fall ~25 ns / 20 ns into 1 nF. For UCC28C45 an internal T flip-flop halves the oscillator frequency, limiting maximum duty cycle to <50%. OUT is actively held low when VDD is below the UVLO turn-on threshold."       },       {         "number": "7",         "name": "VDD",         "type": "power_in",-        "description": "Analog controller bias supply. Recommended operating range up to 18 V (abs max 20 V). UCC28C45 UVLO: VDDON \u2248 8.4 V, VDDOFF \u2248 7.6 V. Bypass to GND with a 0.1 \u00b5F ceramic close to the pin plus bulk capacitance at least 10\u00d7 the driven MOSFET gate capacitance. Start-up current 50 \u00b5A typ; operating current 2.3 mA typ."+        "description": "Analog controller bias supply. Recommended operating range up to 18 V (abs max 20 V). UCC28C45 UVLO: VDDON ≈ 8.4 V, VDDOFF ≈ 7.6 V. Bypass to GND with a 0.1 µF ceramic close to the pin plus bulk capacitance at least 10× the driven MOSFET gate capacitance. Start-up current 50 µA typ; operating current 2.3 mA typ."       },       {         "number": "8",         "name": "VREF",         "type": "power_out",-        "description": "5 V \u00b11% precision reference output used to source the RT/CT timing-resistor current and drive light external loads (up to 20 mA source). Bypass to GND with \u22650.1 \u00b5F ceramic placed close to the pin; additional bypassing required if driving external loads. Short-circuit protected (~45 mA typ)."+        "description": "5 V ±1% precision reference output used to source the RT/CT timing-resistor current and drive light external loads (up to 20 mA source). Bypass to GND with ≥0.1 µF ceramic placed close to the pin; additional bypassing required if driving external loads. Short-circuit protected (~45 mA typ)."       }     ],     "provenance": {@@ -156,5 +156,8 @@     "docs/ucc28c45dr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file