component
UCC28C43DR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers and Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+10−7@@ -38,19 +38,19 @@ "number": "2", "name": "FB", "type": "input",- "description": "Inverting input to the internal error amplifier used to control the power converter voltage-feedback loop for stability. The non-inverting input is internally trimmed to 2.5V \u00b1 1%."+ "description": "Inverting input to the internal error amplifier used to control the power converter voltage-feedback loop for stability. The non-inverting input is internally trimmed to 2.5V ± 1%." }, { "number": "3", "name": "CS", "type": "input",- "description": "Primary-side current sense input (non-inverting input to the PWM comparator). Connect to the current-sense resistor; when this signal exceeds the scaled error-amplifier voltage the PWM terminates OUT conduction. A voltage ramp may be applied here for voltage-mode operation. COMP-to-CS offset \u2248 1.15V, max CS input signal \u2248 1V."+ "description": "Primary-side current sense input (non-inverting input to the PWM comparator). Connect to the current-sense resistor; when this signal exceeds the scaled error-amplifier voltage the PWM terminates OUT conduction. A voltage ramp may be applied here for voltage-mode operation. COMP-to-CS offset ≈ 1.15V, max CS input signal ≈ 1V." }, { "number": "4", "name": "RT/CT", "type": "bidirectional",- "description": "Fixed-frequency oscillator timing node. Connect timing resistor R_RT from VREF to this pin and timing capacitor C_CT from this pin to GND to set switching frequency (fSW = fOSC for the C43). Peak-to-peak ramp \u2248 1.9V; internal discharge current \u2248 8.4mA (with R_RT = 10k\u03a9)."+ "description": "Fixed-frequency oscillator timing node. Connect timing resistor R_RT from VREF to this pin and timing capacitor C_CT from this pin to GND to set switching frequency (fSW = fOSC for the C43). Peak-to-peak ramp ≈ 1.9V; internal discharge current ≈ 8.4mA (with R_RT = 10kΩ)." }, { "number": "5",@@ -62,19 +62,19 @@ "number": "6", "name": "OUT", "type": "output",- "description": "High-current totem-pole gate-drive output intended to directly drive an external MOSFET gate. Rail-to-rail \u00b11A peak (source/sink), 25ns rise / 20ns fall into 1nF; runs at the oscillator frequency with up to ~100% duty cycle for the UCC28C43. OUT is actively held low when VDD is below the turn-on threshold."+ "description": "High-current totem-pole gate-drive output intended to directly drive an external MOSFET gate. Rail-to-rail ±1A peak (source/sink), 25ns rise / 20ns fall into 1nF; runs at the oscillator frequency with up to ~100% duty cycle for the UCC28C43. OUT is actively held low when VDD is below the turn-on threshold." }, { "number": "7", "name": "VDD", "type": "power_in",- "description": "Analog controller bias supply input (recommended operating range up to 18V, absolute max 20V). Requires a 0.1\u00b5F bypass to GND with minimal trace length and additional bulk capacitance \u2265 10\u00d7 the external MOSFET gate capacitance. UVLO turn-on 8.4V / turn-off 7.6V (C43 variant); startup current 50\u00b5A typ, operating current 2.3mA typ."+ "description": "Analog controller bias supply input (recommended operating range up to 18V, absolute max 20V). Requires a 0.1µF bypass to GND with minimal trace length and additional bulk capacitance ≥ 10× the external MOSFET gate capacitance. UVLO turn-on 8.4V / turn-off 7.6V (C43 variant); startup current 50µA typ, operating current 2.3mA typ." }, { "number": "8", "name": "VREF", "type": "power_out",- "description": "5V \u00b11% precision reference output used to source oscillator timing current through R_RT and to power light external loads (up to 20mA source). Must be bypassed to GND with at least a 0.1\u00b5F ceramic located close to the pin for stability."+ "description": "5V ±1% precision reference output used to source oscillator timing current through R_RT and to power light external loads (up to 20mA source). Must be bypassed to GND with at least a 0.1µF ceramic located close to the pin for stability." } ], "provenance": {@@ -138,5 +138,8 @@ "docs/ucc28c43dr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }