component
UCC2807DTR-3
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# UCC2807DTR-3++**Texas Instruments** · DC-DC Converters · SOIC-8++UCC2807DTR-3 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | TRIG | input | Oscillator timing input with an RC-type charge/discharge signal controlling the internal oscillator; signal minimum 1/3 VDD, maximum 2/3 VDD. |+| 2 | COMP | output | Output of the error amplifier and input of the PWM comparator; can source and sink current, and forcing it to GND gives zero duty cycle. |+| 3 | FB | input | Inverting input to the error amplifier; keep connections short and stray capacitance small for best stability. |+| 4 | CS | input | Current sense input to the PWM and overcurrent comparators, with 100ns leading edge blanking after the rising edge at OUT; absolute maximum -0.3V to VDD+0.3V. |+| 5 | GND | power_in | Reference ground and power ground for all functions of the part. |+| 6 | OUT | output | High current totem pole power driver output for a power MOSFET gate, with peak currents exceeding 1A (absolute maximum ±1A), actively held low when VDD is below the UVLO threshold. |+| 7 | VDD | power_in | Power input connection; absolute maximum supply voltage 13.5V (IDD ≤10mA), UCCx807-3 start threshold 4.3V typ and turn-off 4.1V typ, bypass to GND with a ceramic capacitor close to the chip. |+| 8 | DISCH | passive | Provides the low impedance discharge path for the external RC timing network during normal oscillator operation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC2807DTR-3`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc2807dtr-3-etched.step` / `ucc2807dtr-3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2807dtr-3.step` / `ucc2807dtr-3.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc2807-3) (15 pp, sha256 `18e438c9fefd4905`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc2807dtr-3-datasheet.pdf)
page.jsonadded+201@@ -0,0 +1,201 @@+{+ "slug": "ucc2807dtr-3",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "ucc2807dtr-3",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucc2807dtr-3.kicad_sym",+ "ucc2807dtr-3.kicad_mod",+ "ucc2807dtr-3.glb",+ "ucc2807dtr-3.step",+ "ucc2807dtr-3.lbr",+ "docs/hero.png",+ "docs/ucc2807dtr-3-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucc2807dtr-3-hero.glb",+ "ucc2807dtr-3-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCC2807DTR-3",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ucc2807-3",+ "parts": {+ "symbol": "ucc2807dtr-3.kicad_sym",+ "footprint": "ucc2807dtr-3.kicad_mod",+ "model_3d": "ucc2807dtr-3-hero.glb",+ "model_3d_plain": "ucc2807dtr-3.glb",+ "model_3d_step": "ucc2807dtr-3-etched.step",+ "model_3d_step_plain": "ucc2807dtr-3.step",+ "lbr": "ucc2807dtr-3.lbr"+ },+ "distributor_links": {+ "lcsc": "C2868136",+ "digikey": "UCC2807DTR-3-ND",+ "mouser": "595-UCC2807DTR-3"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:50:06Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "UCC2807DTR-3-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-UCC2807DTR-3",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "TRIG",+ "type": "input",+ "description": "Oscillator timing input with an RC-type charge/discharge signal controlling the internal oscillator; signal minimum 1/3 VDD, maximum 2/3 VDD."+ },+ {+ "number": "2",+ "name": "COMP",+ "type": "output",+ "description": "Output of the error amplifier and input of the PWM comparator; can source and sink current, and forcing it to GND gives zero duty cycle."+ },+ {+ "number": "3",+ "name": "FB",+ "type": "input",+ "description": "Inverting input to the error amplifier; keep connections short and stray capacitance small for best stability."+ },+ {+ "number": "4",+ "name": "CS",+ "type": "input",+ "description": "Current sense input to the PWM and overcurrent comparators, with 100ns leading edge blanking after the rising edge at OUT; absolute maximum -0.3V to VDD+0.3V."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Reference ground and power ground for all functions of the part."+ },+ {+ "number": "6",+ "name": "OUT",+ "type": "output",+ "description": "High current totem pole power driver output for a power MOSFET gate, with peak currents exceeding 1A (absolute maximum ±1A), actively held low when VDD is below the UVLO threshold."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Power input connection; absolute maximum supply voltage 13.5V (IDD ≤10mA), UCCx807-3 start threshold 4.3V typ and turn-off 4.1V typ, bypass to GND with a ceramic capacitor close to the chip."+ },+ {+ "number": "8",+ "name": "DISCH",+ "type": "passive",+ "description": "Provides the low impedance discharge path for the external RC timing network during normal oscillator operation."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet shows one connection diagram for DIL-8, SOIC-8 and TSSOP-8 (D and PW packages). The or; DISCH has no matching KiCad type. I used passive because it is a discharge path to the external RC n",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 12,+ "cost_usd": 0.2884,+ "at": "2026-10-08T16:49:23"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucc2807-3",+ "pages": 15,+ "sha256": "18e438c9fefd4905",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucc2807dtr-3.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucc2807dtr-3-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "0c7707dcf90455ffa85e6b0450bfc327f777c0cfbc25706e8dcb53e49ec5efa1",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}