component
UCC2801DTR
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# UCC2801DTR++**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8++UCC2801DTR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | COMP | output | COMP is the error amplifier output and PWM comparator input; it is a low-output-impedance amplifier that can source and sink current, and forcing it to GND gives zero duty cycle. |+| 2 | FB | input | FB is the inverting input of the error amplifier, and its trace should be kept as short as possible with minimal stray capacitance for best stability. |+| 3 | CS | input | CS is the input to the PWM comparator and the over-current comparator, with an internal 100 ns leading-edge blanking; the over-current threshold is 1.55 V typical and the cycle-by-cycle current limit is 1 V typical. |+| 4 | RC | input | RC is the oscillator timing pin, with a timing resistor from REF to RC (recommended 10 kΩ to 200 kΩ, never below 10 kΩ) and a timing capacitor from RC to GND (recommended 100 pF to 1000 pF). |+| 5 | GND | power_in | GND is the reference and power ground for all functions on the device, and the datasheet recommends separating signal return and high-current gate-driver paths. |+| 6 | OUT | output | OUT is the high-current power driver output for MOSFET gates, capable of driving peak currents above ±750 mA, and it is actively held low when VCC is below its threshold. |+| 7 | VCC | power_in | VCC is the device supply input, which should be fed through a current-limiting resistor and bypassed with at least 1 µF in parallel with a 0.1 µF ceramic capacitor; the absolute maximum is 12 V from a low-impedance source, with an internal zener clamp typically at 13.5 V. |+| 8 | REF | output | REF is the 5 V voltage reference for the error amplifier and other internal circuits, which must be bypassed to GND with at least a 0.1 µF ceramic capacitor placed close to the pin, and external loads above 2.5 mA require additional bypassing. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC2801DTR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc2801dtr-etched.step` / `ucc2801dtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2801dtr.step` / `ucc2801dtr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc2801) (59 pp, sha256 `3f7e3ad23bdb4f2f`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc2801dtr-datasheet.pdf)
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it is a low-output-impedance amplifier that can source and sink current, and forcing it to GND gives zero duty cycle."+ },+ {+ "number": "2",+ "name": "FB",+ "type": "input",+ "description": "FB is the inverting input of the error amplifier, and its trace should be kept as short as possible with minimal stray capacitance for best stability."+ },+ {+ "number": "3",+ "name": "CS",+ "type": "input",+ "description": "CS is the input to the PWM comparator and the over-current comparator, with an internal 100 ns leading-edge blanking; the over-current threshold is 1.55 V typical and the cycle-by-cycle current limit is 1 V typical."+ },+ {+ "number": "4",+ "name": "RC",+ "type": "input",+ "description": "RC is the oscillator timing pin, with a timing resistor from REF to RC (recommended 10 kΩ to 200 kΩ, never below 10 kΩ) and a timing capacitor from RC to GND (recommended 100 pF to 1000 pF)."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "GND is the reference and power ground for all functions on the device, and the datasheet recommends separating signal return and high-current gate-driver paths."+ },+ {+ "number": "6",+ "name": "OUT",+ "type": "output",+ "description": "OUT is the high-current power driver output for MOSFET gates, capable of driving peak currents above ±750 mA, and it is actively held low when VCC is below its threshold."+ },+ {+ "number": "7",+ "name": "VCC",+ "type": "power_in",+ "description": "VCC is the device supply input, which should be fed through a current-limiting resistor and bypassed with at least 1 µF in parallel with a 0.1 µF ceramic capacitor; the absolute maximum is 12 V from a low-impedance source, with an internal zener clamp typically at 13.5 V."+ },+ {+ "number": "8",+ "name": "REF",+ "type": "output",+ "description": "REF is the 5 V voltage reference for the error amplifier and other internal circuits, which must be bypassed to GND with at least a 0.1 µF ceramic capacitor placed close to the pin, and external loads above 2.5 mA require additional bypassing."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet labels VCC as input (I); it is mapped to power_in because it is the device supply conn; Pinout taken from the D (SOIC-8) package drawing and Table 5-1; the ordering addendum lists UCC2801D"+ ],+ "pages_sent": 43,+ "cost_usd": 0.2375,+ "at": "2026-10-08T18:59:56"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucc2801",+ "pages": 59,+ "sha256": "3f7e3ad23bdb4f2f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucc2801dtr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucc2801dtr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a1d4370cbca9242066699d9b8f85261b4e545ec29a3cb6a594f3db99cda3c6de",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}