component
UCC27624DR
Public Made by Adomby adom
Texas Instruments Isolators - Gate Drivers, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -45,6 +45,20 @@ UCC27624DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extr - Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm` - 3D model: SOIC-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`ucc27624dr.step`](ucc27624dr.step) | 122 KB | You want the bare part, or you mark your own boards. |+| [`ucc27624dr-etched.step`](ucc27624dr-etched.step) | 2.2 MB | You want the part with `UCC27624DR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 531 faces against 147 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "ucc27624dr",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Texas Instruments Isolators - Gate Drivers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+12−12@@ -4,7 +4,7 @@ "slug": "ucc27624dr", "title": "UCC27624DR", "brief": "Texas Instruments Isolators - Gate Drivers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -35,13 +35,13 @@ "number": "1", "name": "ENA", "type": "input",- "description": "Enable input for Channel A. Biasing ENA LOW disables Channel A output regardless of INA state; pulling ENA HIGH enables Channel A output. If floating, Channel A is enabled by default via an internal ~200 k\u03a9 pullup resistor. Recommended to tie to VDD if unused. Threshold: VENx_H=2V typ, VENx_L=1V typ, hysteresis ~1V."+ "description": "Enable input for Channel A. Biasing ENA LOW disables Channel A output regardless of INA state; pulling ENA HIGH enables Channel A output. If floating, Channel A is enabled by default via an internal ~200 kΩ pullup resistor. Recommended to tie to VDD if unused. Threshold: VENx_H=2V typ, VENx_L=1V typ, hysteresis ~1V." }, { "number": "2", "name": "INA", "type": "input",- "description": "Non-inverting input to Channel A. OUTA is held LOW if INA is unbiased or floating due to an internal ~120 k\u03a9 pulldown resistor. Connect to GND if unused. Input high threshold VINx_H=2V typ, low threshold VINx_L=1V typ, capable of handling -10V."+ "description": "Non-inverting input to Channel A. OUTA is held LOW if INA is unbiased or floating due to an internal ~120 kΩ pulldown resistor. Connect to GND if unused. Input high threshold VINx_H=2V typ, low threshold VINx_L=1V typ, capable of handling -10V." }, { "number": "3",@@ -53,31 +53,31 @@ "number": "4", "name": "INB", "type": "input",- "description": "Non-inverting input to Channel B. OUTB is held LOW if INB is unbiased or floating due to an internal ~120 k\u03a9 pulldown resistor. Connect to GND if unused. Same thresholds as INA (VINx_H=2V typ, VINx_L=1V typ), capable of handling -10V."+ "description": "Non-inverting input to Channel B. OUTB is held LOW if INB is unbiased or floating due to an internal ~120 kΩ pulldown resistor. Connect to GND if unused. Same thresholds as INA (VINx_H=2V typ, VINx_L=1V typ), capable of handling -10V." }, { "number": "5", "name": "OUTB", "type": "output",- "description": "Channel B gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5\u03a9 typ (PMOS DC), pulldown RoL=0.6\u03a9 typ. Output swings from GND to VDD."+ "description": "Channel B gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5Ω typ (PMOS DC), pulldown RoL=0.6Ω typ. Output swings from GND to VDD." }, { "number": "6", "name": "VDD", "type": "power_in",- "description": "Bias supply input. Recommended operating range 4.5V to 26V (absolute max 30V). UVLO rising ~4.1V, falling ~3.8V, 0.3V hysteresis. Bypass with two ceramic capacitors (typically \u22651 \u00b5F and 0.1 \u00b5F) referenced to GND."+ "description": "Bias supply input. Recommended operating range 4.5V to 26V (absolute max 30V). UVLO rising ~4.1V, falling ~3.8V, 0.3V hysteresis. Bypass with two ceramic capacitors (typically ≥1 µF and 0.1 µF) referenced to GND." }, { "number": "7", "name": "OUTA", "type": "output",- "description": "Channel A gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5\u03a9 typ (PMOS DC), pulldown RoL=0.6\u03a9 typ. Output swings from GND to VDD."+ "description": "Channel A gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5Ω typ (PMOS DC), pulldown RoL=0.6Ω typ. Output swings from GND to VDD." }, { "number": "8", "name": "ENB", "type": "input",- "description": "Enable input for Channel B. Biasing ENB LOW disables Channel B output regardless of INB state; pulling ENB HIGH enables Channel B output. If floating, Channel B is enabled by default via an internal ~200 k\u03a9 pullup resistor. Recommended to tie to VDD if unused."+ "description": "Enable input for Channel B. Biasing ENB LOW disables Channel B output regardless of INB state; pulling ENB HIGH enables Channel B output. If floating, Channel B is enabled by default via an internal ~200 kΩ pullup resistor. Recommended to tie to VDD if unused." } ], "provenance": {@@ -151,9 +151,9 @@ "docs/hero.png", "docs/ucc27624dr-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Texas Instruments Isolators - Gate Drivers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D." }