← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-UCC27624DRTR-ND, LCSC_PN C3655293). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·4c1216414c · ·parent 4b41132
2 files changed +32−10
page.json+11−8
@@ -26,19 +26,22 @@       "model_3d_step": "ucc27624dr.step",       "lbr": "ucc27624dr.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-UCC27624DRTR-ND",+      "lcsc": "C3655293"+    },     "pins": [       {         "number": "1",         "name": "ENA",         "type": "input",-        "description": "Enable input for Channel A. Biasing ENA LOW disables Channel A output regardless of INA state; pulling ENA HIGH enables Channel A output. If floating, Channel A is enabled by default via an internal ~200 kΩ pullup resistor. Recommended to tie to VDD if unused. Threshold: VENx_H=2V typ, VENx_L=1V typ, hysteresis ~1V."+        "description": "Enable input for Channel A. Biasing ENA LOW disables Channel A output regardless of INA state; pulling ENA HIGH enables Channel A output. If floating, Channel A is enabled by default via an internal ~200 k\u03a9 pullup resistor. Recommended to tie to VDD if unused. Threshold: VENx_H=2V typ, VENx_L=1V typ, hysteresis ~1V."       },       {         "number": "2",         "name": "INA",         "type": "input",-        "description": "Non-inverting input to Channel A. OUTA is held LOW if INA is unbiased or floating due to an internal ~120 kΩ pulldown resistor. Connect to GND if unused. Input high threshold VINx_H=2V typ, low threshold VINx_L=1V typ, capable of handling -10V."+        "description": "Non-inverting input to Channel A. OUTA is held LOW if INA is unbiased or floating due to an internal ~120 k\u03a9 pulldown resistor. Connect to GND if unused. Input high threshold VINx_H=2V typ, low threshold VINx_L=1V typ, capable of handling -10V."       },       {         "number": "3",@@ -50,31 +53,31 @@         "number": "4",         "name": "INB",         "type": "input",-        "description": "Non-inverting input to Channel B. OUTB is held LOW if INB is unbiased or floating due to an internal ~120 kΩ pulldown resistor. Connect to GND if unused. Same thresholds as INA (VINx_H=2V typ, VINx_L=1V typ), capable of handling -10V."+        "description": "Non-inverting input to Channel B. OUTB is held LOW if INB is unbiased or floating due to an internal ~120 k\u03a9 pulldown resistor. Connect to GND if unused. Same thresholds as INA (VINx_H=2V typ, VINx_L=1V typ), capable of handling -10V."       },       {         "number": "5",         "name": "OUTB",         "type": "output",-        "description": "Channel B gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5Ω typ (PMOS DC), pulldown RoL=0.6Ω typ. Output swings from GND to VDD."+        "description": "Channel B gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5\u03a9 typ (PMOS DC), pulldown RoL=0.6\u03a9 typ. Output swings from GND to VDD."       },       {         "number": "6",         "name": "VDD",         "type": "power_in",-        "description": "Bias supply input. Recommended operating range 4.5V to 26V (absolute max 30V). UVLO rising ~4.1V, falling ~3.8V, 0.3V hysteresis. Bypass with two ceramic capacitors (typically ≥1 µF and 0.1 µF) referenced to GND."+        "description": "Bias supply input. Recommended operating range 4.5V to 26V (absolute max 30V). UVLO rising ~4.1V, falling ~3.8V, 0.3V hysteresis. Bypass with two ceramic capacitors (typically \u22651 \u00b5F and 0.1 \u00b5F) referenced to GND."       },       {         "number": "7",         "name": "OUTA",         "type": "output",-        "description": "Channel A gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5Ω typ (PMOS DC), pulldown RoL=0.6Ω typ. Output swings from GND to VDD."+        "description": "Channel A gate driver output. 5A peak source/sink current, low-side push-pull output. Pullup RoH=5\u03a9 typ (PMOS DC), pulldown RoL=0.6\u03a9 typ. Output swings from GND to VDD."       },       {         "number": "8",         "name": "ENB",         "type": "input",-        "description": "Enable input for Channel B. Biasing ENB LOW disables Channel B output regardless of INB state; pulling ENB HIGH enables Channel B output. If floating, Channel B is enabled by default via an internal ~200 kΩ pullup resistor. Recommended to tie to VDD if unused."+        "description": "Enable input for Channel B. Biasing ENB LOW disables Channel B output regardless of INB state; pulling ENB HIGH enables Channel B output. If floating, Channel B is enabled by default via an internal ~200 k\u03a9 pullup resistor. Recommended to tie to VDD if unused."       }     ],     "provenance": {
ucc27624dr.lbr+21−2
@@ -62,6 +62,18 @@   <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="2.4700"/>+    <vertex x="-2.8400" y="2.8000"/>+    <vertex x="-2.3600" y="2.8000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="2.4500"/>+    <vertex x="1.9500" y="2.4500"/>+    <vertex x="1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="1.4750"/>+  </polygon>   <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="UCC27624DR">@@ -108,7 +120,14 @@         <connect gate="G$1" pin="VDD" pad="6"/>         <connect gate="G$1" pin="OUTB" pad="5"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="UCC27624DR" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-UCC27624DRTR-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C3655293" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>