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UCC27282QDDAQ1
Public Made by Adomby adom
Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# UCC27282QDDAQ1++**Texas Instruments** · Gate Drivers · SOIC-8++UCC27282QDDAQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Positive supply to the low-side gate driver, decoupled to VSS (typical 1 µF); recommended supply range is 5.5 V to 16 V with an absolute maximum of 20 V. |+| 2 | HB | power_in | High-side bootstrap supply with on-chip bootstrap diode and an external bootstrap capacitor (typical 0.1 µF); the voltage on HB with respect to HS must stay below 16 V. |+| 3 | HO | output | High-side output that drives the gate of the high-side MOSFET or one end of an external gate resistor; DC output voltage is limited to VHS - 0.3 V to VHB + 0.3 V. |+| 4 | HS | power_in | High-side source connection to the high-side MOSFET source and the negative side of the bootstrap capacitor; recommended voltage range is -8 V to 100 V (-12 V for pulses under 100 ns). |+| 5 | HI | input | High-side logic input; recommended input voltage range is 0 V to VDD + 0.3 V. |+| 6 | LI | input | Low-side logic input; recommended input voltage range is 0 V to VDD + 0.3 V. |+| 7 | VSS | power_in | Negative supply terminal for the device, generally the system ground; all voltage limits in the datasheet are referenced to VSS. |+| 8 | LO | output | Low-side output that drives the gate of the low-side MOSFET or one end of an external gate resistor; DC output voltage is limited to -0.3 V to VDD + 0.3 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Motor Driver ICs |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC27282QDDAQ1`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc27282qddaq1-etched.step` / `ucc27282qddaq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc27282qddaq1.step` / `ucc27282qddaq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc27282-q1) (49 pp, sha256 `bc116cad0777cb21`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc27282qddaq1-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "ucc27282qddaq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "ucc27282qddaq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucc27282qddaq1.kicad_sym",+ "ucc27282qddaq1.kicad_mod",+ "ucc27282qddaq1.glb",+ "ucc27282qddaq1.step",+ "ucc27282qddaq1.lbr",+ "docs/hero.png",+ "docs/ucc27282qddaq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucc27282qddaq1-hero.glb",+ "ucc27282qddaq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCC27282QDDAQ1",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Motor Driver ICs",+ "subcategory": "Gate Drivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ucc27282-q1",+ "parts": {+ "symbol": "ucc27282qddaq1.kicad_sym",+ "footprint": "ucc27282qddaq1.kicad_mod",+ "model_3d": "ucc27282qddaq1-hero.glb",+ "model_3d_plain": "ucc27282qddaq1.glb",+ "model_3d_step": "ucc27282qddaq1-etched.step",+ "model_3d_step_plain": "ucc27282qddaq1.step",+ "lbr": "ucc27282qddaq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C3654940",+ "digikey": "296-UCC27282QDDAQ1-ND",+ "mouser": "595-UCC27282QDDAQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:04:42Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-UCC27282QDDAQ1-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-UCC27282QDDAQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply to the low-side gate driver, decoupled to VSS (typical 1 µF); recommended supply range is 5.5 V to 16 V with an absolute maximum of 20 V."+ },+ {+ "number": "2",+ "name": "HB",+ "type": "power_in",+ "description": "High-side bootstrap supply with on-chip bootstrap diode and an external bootstrap capacitor (typical 0.1 µF); the voltage on HB with respect to HS must stay below 16 V."+ },+ {+ "number": "3",+ "name": "HO",+ "type": "output",+ "description": "High-side output that drives the gate of the high-side MOSFET or one end of an external gate resistor; DC output voltage is limited to VHS - 0.3 V to VHB + 0.3 V."+ },+ {+ "number": "4",+ "name": "HS",+ "type": "power_in",+ "description": "High-side source connection to the high-side MOSFET source and the negative side of the bootstrap capacitor; recommended voltage range is -8 V to 100 V (-12 V for pulses under 100 ns)."+ },+ {+ "number": "5",+ "name": "HI",+ "type": "input",+ "description": "High-side logic input; recommended input voltage range is 0 V to VDD + 0.3 V."+ },+ {+ "number": "6",+ "name": "LI",+ "type": "input",+ "description": "Low-side logic input; recommended input voltage range is 0 V to VDD + 0.3 V."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply terminal for the device, generally the system ground; all voltage limits in the datasheet are referenced to VSS."+ },+ {+ "number": "8",+ "name": "LO",+ "type": "output",+ "description": "Low-side output that drives the gate of the low-side MOSFET or one end of an external gate resistor; DC output voltage is limited to -0.3 V to VDD + 0.3 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The DDA package has an exposed thermal pad that is not given a pin number in the datasheet. Per the ; The package hint says SOIC-8, but the orderable MPN UCC27282QDDAQ1 is the DDA package (SO PowerPAD, ; EN (pin 6) and NC (pin 2) are DRC (VSON-10) only and do not exist on the DDA package, so they are no"+ ],+ "pages_sent": 8,+ "cost_usd": 0.058,+ "at": "2026-10-08T18:04:16"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucc27282-q1",+ "pages": 49,+ "sha256": "bc116cad0777cb21",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucc27282qddaq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucc27282qddaq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a3f0e3f406a61b2a0aa1761632a95c4a5ebf56d9cbfb60e90e78eea5275e3813",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}