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Set visibility: public

Ray ·e7358a8d8c ·1mo ago ·parent b4e3e54
1 file changed +7−4
page.json+7−4
@@ -50,7 +50,7 @@         "number": "4",         "name": "RT/CT",         "type": "input",-        "description": "Input to the internal oscillator, programmed with an external timing resistor (RT) and timing capacitor (CT). TI recommends CT of 470 pF to 4.7 nF and RT of 5 k\u03a9 to 100 k\u03a9."+        "description": "Input to the internal oscillator, programmed with an external timing resistor (RT) and timing capacitor (CT). TI recommends CT of 470 pF to 4.7 nF and RT of 5 kΩ to 100 kΩ."       },       {         "number": "5",@@ -68,13 +68,13 @@         "number": "7",         "name": "VCC",         "type": "power_in",-        "description": "Bias input to the gate driver and the IC. Requires a bypass capacitor at least 10\u00d7 the gate capacitance of the main switching FET. UC2843A UVLO on/off = 8.4 V / 7.6 V; absolute max 30 V."+        "description": "Bias input to the gate driver and the IC. Requires a bypass capacitor at least 10× the gate capacitance of the main switching FET. UC2843A UVLO on/off = 8.4 V / 7.6 V; absolute max 30 V."       },       {         "number": "8",         "name": "VREF",         "type": "power_out",-        "description": "5-V reference voltage output of the PWM controller. Must supply no more than 10 mA under normal operation; short-circuit protected at ~100 mA. Requires a 1 \u00b5F high-frequency bypass capacitor."+        "description": "5-V reference voltage output of the PWM controller. Must supply no more than 10 mA under normal operation; short-circuit protected at ~100 mA. Requires a 1 µF high-frequency bypass capacitor."       }     ],     "provenance": {@@ -138,5 +138,8 @@     "docs/uc2843ad8tr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file