TX4310B

@@ -26,13 +26,15 @@       "model_3d_step": "tx4310b.step",       "lbr": "tx4310b.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C448640"+    },     "pins": [       {         "number": "1",         "name": "VOUT",         "type": "power_out",-        "description": "Regulated charge-pump voltage output, nominally 3.3 V ±4% (3.17-3.43 V). Requires a low-ESR (<0.1 Ω) ceramic bypass capacitor of ≥10 µF to GND for stability and low output ripple. Can source up to ~250 mA at VIN=3 V; internally current-limited to ~300 mA under short-circuit."+        "description": "Regulated charge-pump voltage output, nominally 3.3 V \u00b14% (3.17-3.43 V). Requires a low-ESR (<0.1 \u03a9) ceramic bypass capacitor of \u226510 \u00b5F to GND for stability and low output ripple. Can source up to ~250 mA at VIN=3 V; internally current-limited to ~300 mA under short-circuit."       },       {         "number": "2",@@ -44,25 +46,25 @@         "number": "3",         "name": "EN",         "type": "input",-        "description": "Active-high CMOS enable input with a threshold of ~0.8 V; driving EN low places the part in shutdown (all internal circuitry off, VOUT disconnected from VDD, IQ <1 µA). High-impedance CMOS input - MUST NOT be left floating; always drive with a valid logic level. Absolute-max VEN = -0.3 V to 6 V."+        "description": "Active-high CMOS enable input with a threshold of ~0.8 V; driving EN low places the part in shutdown (all internal circuitry off, VOUT disconnected from VDD, IQ <1 \u00b5A). High-impedance CMOS input - MUST NOT be left floating; always drive with a valid logic level. Absolute-max VEN = -0.3 V to 6 V."       },       {         "number": "4",         "name": "C-",         "type": "passive",-        "description": "Negative terminal of the flying (bootstrap) charge-pump capacitor. Connect between C- (pin 4) and C+ (pin 6) a low-ESR ceramic capacitor (≥2.2 µF recommended to achieve rated output current). Never use polar capacitors (tantalum/aluminum) here - the pin voltage can reverse during startup."+        "description": "Negative terminal of the flying (bootstrap) charge-pump capacitor. Connect between C- (pin 4) and C+ (pin 6) a low-ESR ceramic capacitor (\u22652.2 \u00b5F recommended to achieve rated output current). Never use polar capacitors (tantalum/aluminum) here - the pin voltage can reverse during startup."       },       {         "number": "5",         "name": "VDD",         "type": "power_in",-        "description": "Input supply pin, 1.8 V to 5 V operating range (absolute-max 6 V). Requires a low-ESR (<0.1 Ω) ceramic bypass capacitor of ≥10 µF to GND placed close to the pin to minimize input ripple. No-load supply current ~0.65 mA (typ, VIN=2.7 V); shutdown current <1 µA."+        "description": "Input supply pin, 1.8 V to 5 V operating range (absolute-max 6 V). Requires a low-ESR (<0.1 \u03a9) ceramic bypass capacitor of \u226510 \u00b5F to GND placed close to the pin to minimize input ripple. No-load supply current ~0.65 mA (typ, VIN=2.7 V); shutdown current <1 \u00b5A."       },       {         "number": "6",         "name": "C+",         "type": "passive",-        "description": "Positive terminal of the flying (bootstrap) charge-pump capacitor. Connect a low-ESR ceramic capacitor (≥2.2 µF) between C+ (pin 6) and C- (pin 4). Do not use tantalum or aluminum electrolytics; polarity across this capacitor can reverse during startup."+        "description": "Positive terminal of the flying (bootstrap) charge-pump capacitor. Connect a low-ESR ceramic capacitor (\u22652.2 \u00b5F) between C+ (pin 6) and C- (pin 4). Do not use tantalum or aluminum electrolytics; polarity across this capacitor can reverse during startup."       }     ],     "provenance": {

@@ -60,6 +60,18 @@   <smd name="4" x="1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/>   <smd name="5" x="1.1375" y="-0.0000" dx="1.3250" dy="0.6000" layer="1"/>   <smd name="6" x="1.1375" y="0.9500" dx="1.3250" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-1.4500" y="1.5100"/>+    <vertex x="-1.6900" y="1.8400"/>+    <vertex x="-1.2100" y="1.8400"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.4000" y="1.4500"/>+    <vertex x="0.8000" y="1.4500"/>+    <vertex x="0.8000" y="-1.4500"/>+    <vertex x="-0.8000" y="-1.4500"/>+    <vertex x="-0.8000" y="1.0500"/>+  </polygon>   <wire x1="-0.9100" y1="1.5600" x2="0.9100" y2="1.5600" width="0.1200" layer="21"/>   <wire x1="-0.9100" y1="1.5100" x2="-0.9100" y2="1.5600" width="0.1200" layer="21"/>   <wire x1="-0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5100" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@   <wire x1="0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5600" width="0.1200" layer="21"/>   <text x="0" y="2.212" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-2.212" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4500" y="1.5100"/><vertex x="-1.6900" y="1.8400"/><vertex x="-1.2100" y="1.8400"/></polygon></package>+</package> </packages> <symbols> <symbol name="TX4310B">@@ -102,7 +114,13 @@         <connect gate="G$1" pin="VDD" pad="5"/>         <connect gate="G$1" pin="C-" pad="4"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="TX4310B" constant="no"/>+          <attribute name="MANUFACTURER" value="XDS" constant="no"/>+          <attribute name="LCSC_PN" value="C448640" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>